I have referred both the below posts https://community.nxp.com/t5/i-MX-Processors/IMX6D-output-yuv422-video-with-vsync-and-hsync/m-p/9010... and Patch to Support BT656 and BT1120 Output For i.MX6 BSP threads.
@qiang_li-mpu_se is there a way to keep HSYNC from toggling while VSYNC is active?
We are using a DS90UB936 TI de-Serializer to receive a BT.656 encoded video from NXP i.mx6 processor via a DS90UB913A Serializer with external VYSNC and HYSNC , because of HSYNC toggle, additional CSI packets are generated after Frame end packets, Is there a solution to prevent this?
From display point of view, the HSYNC and VSYNC are pulse signals, not level signals like camera.
I think it can't support your requirement.