BAR4 and BAR5 can not be accessed

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BAR4 and BAR5 can not be accessed

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masamiyasui
Contributor I

BAR4 and BAR5 of Endpoint on i.MX6Q can not be accessed from Root Complex.
BAR 0 to BAR 3 are accessible without problems.
Is there any restriction on BAR 4 and BAR 5 of i.MX6Q?


I compared the behavior when only two BARs are enabled.

In the following three cases, the memory space allocated on the Root Complex side is the same.

[case 1]

   BAR 0: 32 bit memory 1 MB -> OK
   BAR 2: 32 bit memory 1 MB -> OK


[case 2]
   BAR 0: 32 bit memory 1 MB -> OK
   BAR 4: 32 bit memory 1 MB -> NG


[case 3]
   BAR 0: 32 bit memory 1 MB -> OK
   BAR 5: 32 bit memory 1 MB -> NG

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Masami

please refer to bar differencies described on

https://community.nxp.com/thread/387557?commentID=630870#comment-630870 

Best regards
igor
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masamiyasui
Contributor I

Hello, igorpadykov, thank you for your cooperation.


In the presented information, there was an example using BAR 4 or BAR 5 as the I / O area.


Is there any example that BAR 4 or BAR 5 can be used as a memory area?

Best regards
Masami

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