Dear community.
Our custmer has question below.
The pcie_clk_root could be output from CCM_CLKO2 by setting of CCM_CCOSR register by i.MX6S.
But i.MX6D and iMX6DP are instead of pcie_clk_root in 125M_clk_root.
When the setting of PCIE_AXI_CLK_ROOT is changed, 125M_clk_root also seems to be the same frequency.
Are PCIE_AXI_CLK_ROOT and 125M_clk_root the same one?
Thank you,
Best Regards.
T.Takahashi .
Solved! Go to Solution.
What do you mean as the 125M_clk_root?
For the details on the clocks distribution, please refer to the Clock Tree figures in the Clock Controller Module chapters of the Refernce Manual documents for each of the processors you mentioned.
Have a great day,
Artur
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Dear Artur
thank you for your answer.
In comparison of the reference manual of i.MX6S and i.MX6DQ.
i.MX6Solo is description i.MX 6Solo / 6DualLite Applications Processor Reference Manual
Document Number: IMX6SDLRM Rev. 1, of P871 of CCM_CCOSR field descriptions of (continued) of CLKO2_SEL in the 01001 pcie_clk_root.
i.MX6DQ is description i.MX 6Dual / 6Quad Applications Processor Reference Manual of P882 of CCM_CCOSR field descriptions (continued) of CLKO2_SEL 01001 125M_clk_root .
My question , Is same clock of pcie_clk_root and 125M_clk_root ?
Thank you,
Best Regards.
T.Takahashi.
Yes, this is the same clock.