Any buffer can be fine tuned for cspi

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Any buffer can be fine tuned for cspi

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Contributor III

Hi Support,

We found the performance of SPI interface is about TX 4.2Mbps, RX 3.6Mbps. Do you know any buffer in cspi that we can enlarge to see any improvement, especially RX path ?

Regards,

Steven Yu

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2 Replies

NXP TechSupport
NXP TechSupport

Hi Steven

for eCSPI module one can try to increase BURST_LENGTH parameter

in ECSPIx_CONREG register. For processors with M4 core one can assign

spi procedures to this core. In general spi performance will depend on processor

load and application.

Best regards
igor
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Contributor III

Thanks, igor!

We have seen this piece of code in static spi_imx_setupxfer, however, if we double the value, it will cause spi read data error. 

if (bits == 32) {
unsigned len = spi_imx->len / 4;

while (len > 128) {
if (len & 1)
break;
len >>= 1;
}
while (len > 128) {
if (len % 3)
break;
len /= 3;
}
if ((len > 128) || !len)
len = 1;
bits = len << 5;
}
ctrl |= (bits - 1) << MX51_ECSPI_CTRL_BL_OFFSET;

==> 

ctrl |= (2*(bits - 1)) << MX51_ECSPI_CTRL_BL_OFFSET;

Regards,

Steven Yu

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