Add DDR4 memory to imx8mp

[VoVan]

We try add DDR4 64 Gb(8Gigabytes) memory to imx8mp - 2 devices 32 Gb(4Gigabytes) each with 2 bank group adresses(K4ABG165WA). We use MX8M_Plus_DDR4_RPA_v8.xlsx.

Our configuration:

Memory type:                                            DDR4
Manufacturer:                                            Samsung
Memory part number:                                K4ABG165WA-MCWE
DDR4 Density per Device (Gb)                 16( > 16Gb more impossible to choose)!!!
Number of DDR4 devices per chip select  2
Density per chip select (Gb):                      32
Number of Chip Selects used                     1
Total DRAM density (Gb)                            32
Number of ROW Addresses                       17
Number of COLUMN Addresses                 10
Number of BANK addresses                       2
Number of BANK GROUP addresses         2
Total number of BANKS                              16
DDR4 Data Bus width per device               16
Total Data Bus Width                                  32
Clock Cycle Freq (MHz)                              1600
Clock Cycle Time (ns)                                 0,625
FREQ1 setpoint Clock Cycle Freq (MHz)   668
FREQ1 Clock Cycle Time (ns)                    1,49700598802395

With this config we have:

memory set 0x3D400200 32 0x0000001F #DDRC_ADDRMAP0
memory set 0x3D400204 32 0x003F0909 #DDRC_ADDRMAP1
memory set 0x3D400208 32 0x00000700 #DDRC_ADDRMAP2
memory set 0x3D40020C 32 0x00000000 #DDRC_ADDRMAP3
memory set 0x3D400210 32 0x00001F1F #DDRC_ADDRMAP4
memory set 0x3D400214 32 0x08080808 #DDRC_ADDRMAP5
memory set 0x3D400218 32 0x08080808 #DDRC_ADDRMAP6
memory set 0x3D40021c 32 0x00000F08 #DDRC_ADDRMAP7
memory set 0x3D400220 32 0x00000801 #DDRC_ADDRMAP8

With this config DDR4 not work properly. U-boot don't load from RAM.

When set Number of BANK GROUP addresses = 1 We have:

memory set 0x3D400200 32 0x0000001F #DDRC_ADDRMAP0
memory set 0x3D400204 32 0x003F0909 #DDRC_ADDRMAP1
memory set 0x3D400208 32 0x00000700 #DDRC_ADDRMAP2
memory set 0x3D40020C 32 0x00000000 #DDRC_ADDRMAP3
memory set 0x3D400210 32 0x00001F1F #DDRC_ADDRMAP4
memory set 0x3D400214 32 0x07070707 #DDRC_ADDRMAP5
memory set 0x3D400218 32 0x07070707 #DDRC_ADDRMAP6
memory set 0x3D40021c 32 0x00000F07 #DDRC_ADDRMAP7
memory set 0x3D400220 32 0x00003F01 #DDRC_ADDRMAP8

DDR4 work (only 4Gigabytes: Since there is no bank switching).U-boot load, only 4Gigabytes work properly with mtest, other 4Gigabytes don't work!!!

Someone checked work of DDR4 memory without chipselect(Number of Chip Selects used = 1) and with switching bank group(Number of BANK GROUP addresses = 2)???

[VoVan · Accepted solution]

I solved the problem. I got the whole range - 8Gb.
For this, I divided the memory into two regions: 3Gb and 5Gb, despite the fact that I have two DDR4 memory 4Gb each.
There is also a limit on the maximum size of memory in the optee-os package (6Gb) for imx8mp and other platforms.
I am attaching patches for imx8mp 5.4.70 yocto, maybe someone will need them.

Result of work:
u-boot=> mtest 60000000 240000000
Testing 60000000 ... 240000000:
Pattern 00000000 Writing... Reading...ading...Iteration: 65

DDR4 memory 8Gigabytes: 2 bank group adresses(K4ABG165WA).

[kenli]

hello,

so could you share the last value of BANK GROUP addresses .1 or 2? many thanks.

[VoVan]

Special thanks to nxp specialists for the hint on splitting memory regions into 3 and 5 Gb!!!

[VoVan]

include/configs/imx8mp_evk.h changes:(CONFIG_TARGET_IMX8MP_DDR4_EVK set in config)

#ifdef CONFIG_TARGET_IMX8MP_DDR4_EVK
#undef PHYS_SDRAM_SIZE
#undef PHYS_SDRAM_2
#define PHYS_SDRAM_SIZE 0x100000000 /* 4 GB */
#define PHYS_SDRAM_2 0x140000000
#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
#else
#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
#endif

Load from UUU:

U-Boot SPL 2020.04-5.4.70-2.3.3+g44f5949dd9 (Mar 09 2023 - 13:48:34 +0000)
DDRINFO: start DRAM init
DDRINFO: DRAM rate 3200MTS
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from BOOTROM
image offset 0x0, pagesize 0x200, ivt offset 0x0
NOTICE: BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-0-g2a2678646
NOTICE: BL31: Built : 12:16:55, Feb 17 2023

U-Boot 2020.04-5.4.70-2.3.3+g44f5949dd9 (Mar 09 2023 - 13:48:34 +0000)

CPU: i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 28C
Reset cause: POR
Model: NXP i.MX8MPlus LPDDR4 EVK board
DRAM: 8 GiB
TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C2 0x50]
SNK.Power3.0 on CC1
PDO 0: type 0, 5000 mV, 3000 mA [E]
PDO 1: type 0, 9000 mV, 3000 mA []
PDO 2: type 0, 15000 mV, 3000 mA []
PDO 3: type 0, 20000 mV, 2250 mA []
Requesting PDO 3: 20000 mV, 2250 mA
Source accept request
PD source ready!
tcpc_pd_receive_message: Polling ALERT register, TCPC_ALERT_RX_STATUS bit failed, ret = -62
Power supply on USB2
TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C1 0x50]
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment

[*]-Video Link 0Can't find cec device id=0x3c
fail to probe panel device adv7535@3d
fail to get display timings
probe video device failed, ret -19

[0] lcd-controller@32e80000, video
[1] mipi_dsi@32e60000, video_bridge
[2] adv7535@3d, panel
Can't find cec device id=0x3c
fail to probe panel device adv7535@3d
fail to get display timings
probe video device failed, ret -19
In: serial
Out: serial
Err: serial

BuildInfo:
- ATF 2a26786
- U-Boot 2020.04-5.4.70-2.3.3+g44f5949dd9

switch to partitions #0, OK
mmc2(part 0) is current device
flash target is MMC:2
Net:
Error: ethernet@30be0000 address not set.

Error: ethernet@30be0000 address not set.

Error: ethernet@30bf0000 address not set.

Error: ethernet@30bf0000 address not set.
No ethernet found.

Fastboot: Normal
Normal Boot
Hit any key to stop autoboot: 0
u-boot=>
u-boot=>
u-boot=>
u-boot=>
u-boot=> mtest 0x60000000 0x190000000
Testing 60000000 ... 190000000:
Pattern FFFFFFFFFFFFFFFF Writing... Reading...n: 2
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> <INTERRUPT>
u-boot=> mtest 0x60000000 0x200000000
Testing 60000000 ... 200000000:
Pattern 00000000 Writing... Reading..."Synchronous Abort" handler, esr 0x96000210
elr: 000000004020e5a8 lr : 000000004020e568 (reloc)
elr: 0000000053f225a8 lr : 0000000053f22568
x0 : 0000000000000001 x1 : 00000000308900b4
x2 : 000000002bffffff x3 : 0000000000000001
x4 : 0000000000000020 x5 : 0000000000000000
x6 : 00000000ffffffd8 x7 : 0000000000000000
x8 : 0000000051bf70f8 x9 : 00000000ac82ca15
x10: 00000000ffffffd0 x11: 0000000000000010
x12: 0000000000000006 x13: 000000000001869f
x14: 0000000051bf7438 x15: 0000000000000001
x16: 0000000053f5c948 x17: 00000000000042f0
x18: 0000000051bffdb8 x19: 000000002c000000
x20: 0000000200000000 x21: 0000000000000000
x22: 0000000000000000 x23: 0000000060000000
x24: 0000000000000001 x25: 0000000053fa4b92
x26: 0000000053fa4bd6 x27: 0000000060000000
x28: 00000001c0000000 x29: 0000000051bf7130

Code: 17ffffe2 f8008401 8b180021 17ffffea (f9400382)
Resetting CPU ...

resetting ...

When set 0x3d4000220(ADDRMAP8) to 0x801 by your xls formula - uboot don't load!!! Why 8 set to ADDRMAP_BG_B1???

When set 0x3d4000220(ADDRMAP8) to 0xa01 by set manually - uboot load ok!!! mtest 0x60000000 0x190000000 - work good!!!, but from address 0x200000000 failed!!!

How to work with map registers???

memory set 0x3D400200 32 0x0000001F #DDRC_ADDRMAP0
memory set 0x3D400204 32 0x003F0909 #DDRC_ADDRMAP1
memory set 0x3D400208 32 0x00000700 #DDRC_ADDRMAP2
memory set 0x3D40020C 32 0x00000000 #DDRC_ADDRMAP3
memory set 0x3D400210 32 0x00001F1F #DDRC_ADDRMAP4
memory set 0x3D400214 32 0x08080808 #DDRC_ADDRMAP5
memory set 0x3D400218 32 0x08080808 #DDRC_ADDRMAP6
memory set 0x3D40021c 32 0x00000F08 #DDRC_ADDRMAP7
memory set 0x3D400220 32 0x00000a01 #DDRC_ADDRMAP8

What registers need to be changed to start working the entire range of memory???(maybe other ADDRMAP registers or something else)???

I already test work DDR4 from 0x6000000 to 0x190000000 by mtest( need work from 0x200000000 to 0x240000000)....

[VoVan]

With this code:

mw 0x3d400200, 0x1f
mw 0x3d400204, 0x3f0909
mw 0x3d400208, 0x700
mw 0x3d40020c, 0x0
mw 0x3d400210, 0x1f1f
mw 0x3d400214, 0x8080808
mw 0x3d400218, 0x8080808
mw 0x3d40021c, 0xf08
mw 0x3d400220, 0xa01

or with this:

mw 0x3d400200, 0x1f
mw 0x3d400204, 0x3f0a0a
mw 0x3d400208, 0x700
mw 0x3d40020c, 0x0
mw 0x3d400210, 0x1f1f
mw 0x3d400214, 0x8080808
mw 0x3d400218, 0x8080808
mw 0x3d40021c, 0xf08
mw 0x3d400220, 0x801

I have the same results( work 6Gb DDR4, but don't work other 2Gb).

u-boot=> mtest 60000000 1c0000000
Testing 60000000 ... 1c0000000:
Pattern FFFFFFFFFFFFFFFF Writing... Reading...n: 28: 27

[VoVan]

From imx8mp xls(c31 - total data bus width = 32 bit):

addrmap_bank_b0 = (if c31 == 32) ? 9 : 7 = 0x9;

From imx8mm mini xls(c31 - total data bus width = 32 bit, C28 - number of bank group = 2):

addrmap_bank_b0 = ((7 + C31/16) + (C28 - 1 ))) = 0xa

addrmap_bank_b0 = ((7 + C31/16) + (C28 - 1 ))) = 0x9, when C28 = 1

imx8mp xls don't use c28 setting, imx8mm use c28 .........

[VoVan]

Next step:

include/configs/imx8mp_evk.h changes:(CONFIG_TARGET_IMX8MP_DDR4_EVK set in config)

#ifdef CONFIG_TARGET_IMX8MP_DDR4_EVK
#undef PHYS_SDRAM_SIZE
#undef PHYS_SDRAM_2
#define PHYS_SDRAM_SIZE 0x100000000 /* 4 GB */
#define PHYS_SDRAM_2 0x140000000
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
#else
#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
#endif

UUU load:

U-Boot 2020.04-5.4.70-2.3.3+g44f5949dd9 (Mar 10 2023 - 13:24:17 +0000)

CPU: i.MX8MP[8] rev1.1 1600 MHz (running at 1200 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 46C
Reset cause: POR
Model: NXP i.MX8MPlus LPDDR4 EVK board
DRAM: 6 GiB
TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C2 0x50]
SNK.Power3.0 on CC1
PDO 0: type 0, 5000 mV, 3000 mA [E]
PDO 1: type 0, 9000 mV, 3000 mA []
PDO 2: type 0, 15000 mV, 3000 mA []
PDO 3: type 0, 20000 mV, 2250 mA []
Requesting PDO 3: 20000 mV, 2250 mA
Source accept request
PD source ready!
tcpc_pd_receive_message: Polling ALERT register, TCPC_ALERT_RX_STATUS bit failed, ret = -62
Power supply on USB2
TCPC: Vendor ID [0x1fc9], Product ID [0x5110], Addr [I2C1 0x50]
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default environment

[*]-Video Link 0Can't find cec device id=0x3c
fail to probe panel device adv7535@3d
fail to get display timings
probe video device failed, ret -19

[0] lcd-controller@32e80000, video
[1] mipi_dsi@32e60000, video_bridge
[2] adv7535@3d, panel
Can't find cec device id=0x3c
fail to probe panel device adv7535@3d
fail to get display timings
probe video device failed, ret -19
In: serial
Out: serial
Err: serial

BuildInfo:
- ATF 2a26786
- U-Boot 2020.04-5.4.70-2.3.3+g44f5949dd9

switch to partitions #0, OK
mmc2(part 0) is current device
flash target is MMC:2
Net:
Error: ethernet@30be0000 address not set.

Error: ethernet@30be0000 address not set.

Error: ethernet@30bf0000 address not set.

Error: ethernet@30bf0000 address not set.
No ethernet found.

Fastboot: Normal
Normal Boot
Hit any key to stop autoboot: 0
u-boot=>
u-boot=>
u-boot=>
u-boot=>
u-boot=>
u-boot=>
u-boot=>
u-boot=> mtest 60000000 1c0000000
Testing 60000000 ... 1c0000000:
Pattern FFFFFFFFFFFFFFFF Writing... Reading...n: 20: 19

u-boot=> run bootcmd
switch to partitions #0, OK
mmc2(part 0) is current device
30931456 bytes read in 170 ms (173.5 MiB/s)
Booting from mmc ...
64519 bytes read in 11 ms (5.6 MiB/s)
## Flattened Device Tree blob at 43000000
Booting using the fdt blob at 0x43000000
Using Device Tree in place at 0000000043000000, end 0000000043012c06
Can't find cec device id=0x3c
fail to probe panel device adv7535@3d
fail to get display timings
probe video device failed, ret -19

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 5.15.32-lts-next+gfa6c3168595c (oe-user@oe-host) (aarch64-poky-linux-gcc (GCC) 11.2.0, GNU ld (GNU Binutils) 2.38.20220313
) #1 SMP PREEMPT Tue Jun 7 02:34:46 UTC 2022
[ 0.000000] Machine model: NXP i.MX8MPlus EVK board
[ 0.000000] efi: UEFI not found.
[ 0.000000] Reserved memory: created CMA memory pool at 0x00000000c4000000, size 960 MiB
[ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000094300000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node vdev0buffer@94300000, compatible id shared-dma-pool
[ 0.000000] NUMA: No NUMA configuration found
[ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x00000001bfffffff]
[ 0.000000] NUMA: NODE_DATA [mem 0x1bf443800-0x1bf445fff]
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal [mem 0x0000000100000000-0x00000001bfffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000040000000-0x0000000055ffffff]
[ 0.000000] node 0: [mem 0x0000000058000000-0x00000000923fffff]
[ 0.000000] node 0: [mem 0x0000000092400000-0x00000000a43fffff]
[ 0.000000] node 0: [mem 0x00000000a4400000-0x00000001bfffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x00000001bfffffff]
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] psci: SMC Calling Convention v1.1
[ 0.000000] percpu: Embedded 20 pages/cpu s41176 r8192 d32552 u81920
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: detected: GIC system register CPU interface
[ 0.000000] CPU features: detected: ARM erratum 845719
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1540096
[ 0.000000] Policy zone: Normal
[ 0.000000] Kernel command line: console=ttymxc1,115200 root=/dev/mmcblk2p2 rootwait rw
[ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] software IO TLB: mapped [mem 0x00000000c0000000-0x00000000c4000000] (64MB)
[ 0.000000] Memory: 4760656K/6258688K available (18560K kernel code, 1534K rwdata, 7072K rodata, 2944K init, 541K bss, 514992K reserved, 983040K cma
-reserved)

So with 6Gb setting kernel and u-boot work correct :-). But not work with 8Gb. And i have a question.

Has anyone tried using 8Gb on imx8mp(supported by documentation)???

Why in the utility DDR Stress Tool you can choose only 6GB Max density???

[Sanket_Parekh]

Hi @VoVan,

I hope you are doing well.

Have you made any changes to u-boot configuration header file and device tree file?

Please provide me with u-boot configuration header for the board (e.g. /include/configs/imx8mp_evk.h) for further debugging.

Thanks & Regards,
Sanket Parekh