About the Errata TLSbo95476 detailed contents for i.MX25

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About the Errata TLSbo95476 detailed contents for i.MX25

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yuuki
Senior Contributor II

Dear all,

We connect a 24bit LCD panel to i.MX257.
However, nothing is displayed.

In other times, when 16bit LCD panel was used, there was no problem.

We checked a waveform.
At the OE signal rise, there was a missing clock of LSCLK.

Therefore we refer to Errata TLSbo95476.

We have some questions.

(1)
Does this Errata apply to setting of 16dpp and 24dpp too?
(We think that this Errata does not be applied to 16dpp setting.)

(2)
Three following cases are explained in Description.
- One clock cycle before assertion of OE_ACD
- When VSYNC is asserted
- When VSYNC is negated

Is the incidence of this problem 100%?
(Though it is these conditions, is there the case which a problem does not produce?)

(3)
When Non-TFT Mode is used (OE signal is not used), can this Errata be evaded?

(4)
As workaround, we consider that we output ipg_pre_lcdc from CLKO.
ipg_pre_lcdc is not explained in CLKO SEL of MCR Field Descriptions.
Is it possible to output ipg_pre_lcdc from CLKO?

Best Regards,
Yuuki

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