About "global acknowledge" and "debug acknowledge" of i.MX6

[yuuki]

Dear all,

I am referring to IOMUXC_GPR3 register.

IMX6SDLRM.pdf (Rev1)
- IOMUXC_GPR3 field descriptions(P.2039)

In 13-15 fileds, "global acknowledge" and "debug acknowledge" are described.

However, I cannot find these detail descriptions.

Would you teach the part where these are indicated?

Should these bits be set in what kind of case?

Best Regards,

[igorpadykov]

Hi yuuki,

these are arm CTI signals (described in Chapter 10 Debug

DDI0388I_ cortex_a9_r4p1_trm.pdf document (www.arm.com) ) -

can be masked separately for each core.

Shortly IMX6SDLRM.pdf (Rev1) describes them in sect.12.6 :

The Cross Trigger Interface (CTI) is included in the

Cortex-A9 platform to provide a common programming model for use by the debug

tools, control the trigger sources, and interface to the Cross Trigger Matrix (CTM). The

debug is controlled via an ARM Debug Access Port (DAP).

Best regards

chip

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