Our customer has question below.
the following power supply configuration, over-current flows in the SoC of the line before and after the oscillation of the GDC, SoC power supply voltage is reduced in its influence.
Events subsequent power resulting in OFF has occurred.
Waveform of when an event occurs Please refer to the attachment sheet.
For this reason would you please advice.
- ARM / SoC after the power is turned on, the reason for that the movement and the mechanism by which the over-
current is generated before and after the GDC is to start the oscillation is the correct design.
- Workaround at GDC side order, this event will not happen.
please refer attachment figure.
As specified in the part's Data Sheet document I've found on the part vendor's web site:
the maximum output current the part can supply is 2.0A. On the other hand, the Data Sheet document for the i.MX6Dual/Quad processors specifies that, in some conditions (especially, at power-up or running highly resource-consuming applications), the current consumption on the VDD_ARM_IN and VDD_SOC_IN power rails can exceed 2.0A. So, I suggest you to use the power supply parts that can provide more than 2.0A of output current (at least 2.5A for i.MX6Dual processor) as the VDD_ARM_IN and VDD_SOC_IN power supplies.
Unfortunately, the information you've provided is not enough to make any consideration on the issue. To make me able to do this, please provide the complete schematics of your system. Also, please specify the maximum measured peak current on the VDD_SOC_IN power rail when the issue occurs.
Have a great day,
1. The schematic you've provided is incomplete, the power supply is not shown there. Please provide the complete schematic.
2. When do these current peaks occur? Do they occur in a random moments, or during initial VDD_SOC_IN voltage power-on ramp-up only? Please clarify.