About imx6sololite CSI and eDMA synchronous problem

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About imx6sololite CSI and eDMA synchronous problem

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fisherhe
Contributor II

Hi,

   I meet a problem about CSI module on IMX6L2EVN10AB.

   There is a CMOS camera sensor connected to IMX6SL, using parallel CSI 12bit connection with Bayer format. Now I need to acquire the data using eDMA in 8 bit mode.

    I find that it need to manually synchronize the three of DMA, RxFIFO,and VSYNC signal, otherwise the start position of the image is wrong.

   Now I only find CSI_CSICR3 (bit 12 DMA_REQ_EN_RFF) to disable the CSI module,actually this bit only disable the DMA request. When I clear bit 12 to stop, next time restart CSI again, there is data in RxFiFo,

     and these data has to be ignored. So there will be at lease a waste of  one frame of translation time. I really want to save this time.

   Is there any way to automaticlly synchronize the start of eDMA to VSYNC?

   Below is the code now I use to synchronize:

while(!HW_CSI_CSISR.B.EOF_INT);

HW_CSI_CSICR1.B.CLR_RXFIFO = 1;

HW_CSI_CSICR3.B.DMA_REFLASH_RFF = 1;

    But this way will bring the problem I described before.

    Thanks a lot!

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art
NXP TechSupport
NXP TechSupport

Have you configured CSI to operate in Gated clock mode? Seems that you have to

do so. Then, you have to properly configure CSI, wait for first Start Of Frame

(SOF) interrupt, clear RXFIFO, reflash (restart) eDMA and then enable a DMA

request. Everything should work synchronously in that sequence.


Have a great day,
Artur

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fisherhe
Contributor II

Hi,

I find some code on the website of Freescale:

void csi_streamon(void)

{

    /* wait for EOF and clear RxFIFO */

    HW_CSI_CSISR.B.EOF_INT = 1;

    while (HW_CSI_CSISR.B.EOF_INT == 0) ;

    HW_CSI_CSICR1.B.CLR_RXFIFO = 1;

    /* buffer address: word aligned */

    HW_CSI_CSIDMASA_FB1_WR(DDR_PXP_PS_BASE1);

    HW_CSI_CSIDMASA_FB2_WR(DDR_PXP_PS_BASE1);

    HW_CSI_CSICR3.B.DMA_REFLASH_RFF = 1;

}

It shows that very time starting the operation, it needs to synchronize the DMA and RxFIFO to VSYNC.Is there any way to automatically synchronize the DMA to VSYNC but not to do it on every start?

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fisherhe
Contributor II

Thank you for your reply!! I was on vocation a few days ago....

Yes, I configured CSI in Gated clock mode.

The problem is that I need to acquire the camera data for a while and then set the camera in sleep mode.

The first frame is right, but the frames after that is all wrong. It seems that when DMA is working, there is still data input to the RxFIFO.

And I don't want to lose any one of frame.

Is your suggestion work on non-repeat mode? If I only want to acquire one frame, this works.But when I need to continuously acquire data, it seems

not OK.Can you give me some advice on how to receive camera data continuously? Or is there any document?

Thank you very much.

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