About i.MX53 ENGcm11038.

[satoshishimoda]

Hi community,

Our partner have a question about i.MX53 ENGcm11038.

Please see their questions as below.

[Q1]

Please see ENGcm22038 description in IMX53CE (Rev.5).

It says "Due to non proper clock synchronization implementation,".

Our partner want to know this issue is a problem between what clock and what clock.

Would you let me know it?

[Q2]

We understansd EMI2.5 = EIM, so we believe this errata will be not occurred when EIM is not used, right?

Or EMI includes not only EIM but also DRAM and NAND interface?

Best Regards,

Satoshi Shimoda

[Yuri · Accepted solution]

  From the team :

1>  Sorry,  it's an old project, and not designed by our team, so I am not able to find the information so far

2> the EMI include ddr and nand interface.  So they are also impacted

Have a great day,
Yuri

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[satoshishimoda]

Hi Yuri,

2> the EMI include ddr and nand interface.  So they are also impacted

OK, I got it.

By the way, I guess this errata is not occurred if the EIM pads is used for other function (ex. use EIM_A25 pad for GPIO instead of EIM), right?

Best Regards,

Satoshi Shimoda

[Yuri]

Yes, GPIO is not affected.

Regards,

Yuri.