About control the WM8962 on i.MX6Q SABRE-SDP

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About control the WM8962 on i.MX6Q SABRE-SDP

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keitanagashima
Senior Contributor I

Dear Sir or Madam,

Refer to schematic of MCIMX6Q-SDP.

When controlling off, U7(WM8962) has sometimes worked by controlling power ON/OFF of CODEC_PMR_EN3 on SABRE-SDP.

(Q506, Q50, Q505 are working correctly.)

I seem that SPKVDD, AUD_3V3 and AUD_1V8 are applied some voltage.

Please tel me this cause and workaround.

Best Regards,

Keita

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Keita,

     please see following :

(1)SPKVDD:

pull CODEC_PWR_EN pin to HIGH, SPKVDD will be 4.2V

(2)AUD_3V3 & AUD_1V8

After CODEC_PWR_EN is pulled to HIGH , Pin 1 of Q509 and Q505 is LOW level, so Q509 and Q505 begin to work, AUD_3V3 will be 3.3V , and AUD_1V8 is 1.8V.

Regards,

Weidong

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keitanagashima
Senior Contributor I

Dear Weidong,

Thank you for your reply.

But, I would like to know why are there remaining-voltage of SPKVDD, AUD_3V3 and AUD_1V8 despite CODEC_PMR_EN3 = OFF(Low).

[Detail] CODEC_PMR_EN3 ON --> OFF

- SPKVDD : 4.2V --> 2.0V

- AUD_3V3 : 3.3V--> 3.1V

- AUD_1V8 : 1.8V --> 1.3V

[Problem]

When CODEC_PMR_EN3 is OFF(Low), i.MX6 was sometimes possible to access the WM8962 via I2C.

Best Regards,

Keita

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weidong_sun
NXP TechSupport
NXP TechSupport

Hi Keita,

     If CODEC_PMR_EN3 is pulled down to LOW, WM8962 should be powered off, CPU shouldn't access codec by I2C bus. Which board are you using ?

Regards,

Weidong

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keitanagashima
Senior Contributor I

Hi Weidong,

Do you have any update?

Keita

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Keita,

   Very sorry for my late reply !

[Detail] CODEC_PMR_EN3 ON --> OFF

- SPKVDD : 4.2V --> 2.0V

- AUD_3V3 : 3.3V--> 3.1V

- AUD_1V8 : 1.8V --> 1.3V

I feel the above voltages should be generated by capacitors after CODEC is powered off. I2C level is 3.3V, but residual voltage is 3.1V, so CPU can access WM8962 by I2C bus.

Regards,

weidong

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keitanagashima
Senior Contributor I

Hi Weidong,

>If CODEC_PMR_EN3 is pulled down to LOW, WM8962 should be powered off, CPU shouldn't access codec by I2C bus.

I think so too.

But, CPU was possible to access codec by I2C bus, when CODEC_PMR_EN3 is pulled down to LOW (= WM8962 should be powered off).

>Which board are you using ?

MCIMX6Q-SDP (SABRE platform board)

Best Regards,

Keita

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keitanagashima
Senior Contributor I

Hi Weidong,

Do you have any update?

Keita

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