About bit swapping of data lanes

[okamotosatoshi]

Hi There,

I am designing LPDDR4 using i.MX8M Mini.

i.MX6 has the following restrictions on the data lane.

　・D0, D8, D16, D24, D32, D40, D48, and D56 are fixed
　・Other data lines free to swap within byte lane
　　（Refer to the Hardware Development Guide）

i.MX8M Mini has the following description.

　・Byte swapping within each 16-bit channel is OK. Bit swapping within each slice/byte lane is OK.
　　（Refer to the Hardware Developer's Guide）

Is it okay to think that i.MX8M Mini has no restrictions to fix the lower bits ?

Best regards
- satoshi

[okamotosatoshi]

Hi Yuri

Thank you for your answer！

I understand that there are no restrictions to fix the lower bits.

I consider pin swaps according to the guidelines.

Best regards
- satoshi

[Yuri · Accepted solution]

@okamotosatoshi 

Hello,

   Yes, i.MX8M Mini has no restrictions to fix the lower bits.

Regards,
Yuri.