About a timing of CSPI for i.MX253

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About a timing of CSPI for i.MX253

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yuuki
Senior Contributor II

Dear all,

I refer to "3.7.5 Configurable Serial Peripheral Interface (CSPI) Timing" of the data sheet.
A timing parameter is listed by "Table 43. CSPI Interface Timing Parameters".

<Datasheet>
IMX25CEC Rev. 10, 07/2013:
   - 3.7.5 Configurable Serial Peripheral Interface (CSPI) Timing (P.54)
   - Table 43. CSPI Interface Timing Parameters (P.55)

The following is explained in an explanatory note.
What do these parameters mean?

Tsclk = CSPI clock period
Tper = CSPI reference baud rate clock period (PERCLK2)
Tipg = CSPI main clock IPG_CLOCK period


1) Is Tsclk equal to tclko or tclki?
2) What does PERCLK2 mean?
   I was not able to find this in a data sheet and a reference manual.
3) Does IPG_CLOCK mean ipg_clk_cspi1-ipg_clk_cspi3?


May I have advice?

Best Regards,
Yuuki

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Yuri
NXP Employee
NXP Employee
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Yuri
NXP Employee
NXP Employee

Hello,

  Please look at my comments below.

 

1) Is Tsclk equal to tclko or tclki?

 

  Tsclk is equal to tclko (CSPI master SCLK cycle time)

 

2) What does PERCLK2 mean?

 

  PERCLK2 should be considered as misprint (a derivative from i.MX27 documentation).

Use IPG_CLOCK as reference clock here.

 

3) Does IPG_CLOCK mean ipg_clk_cspi1-ipg_clk_cspi3?

 

Correct.


Have a great day,
Yuri

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yuuki
Senior Contributor II

Yuri

Dear Yuri-san,

Thank you for a quick response.

I understood that Tper was equal to Tipg.
(Tper = Tipg = IPG_CLOCK period = ipg_clk_cspi1-ipg_clk_cspi3 period)

Is this correct understanding?

Best Regards,

Yuuki

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Yuri
NXP Employee
NXP Employee

Correct.

~Yuri.

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