About a recommendation schematic of 24MHz oscillator for i.MX6.

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About a recommendation schematic of 24MHz oscillator for i.MX6.

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Contributor V

Dear all,

We'd like to use 24MHz oscillator.
We'd like to connect 24MHz oscillator to a XTALI pin.

Is there a recommendation schematic or a sample schematic?

Best Regards,
Yuuki Murasato

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NXP TechSupport
NXP TechSupport

There is no reference schematic by Freescale that shows the use of 24MHz oscillator with i.MX6 series processors. However, it is possible to use an external 24MHz oscillator as a main clock source for i.MX6 series processors. In that case, the basic requirements are as follows.

1. Connect the output of 24MHz oscillator to the XTALI pin of i.MX6, leave the XTALO pin floating.

2. The logic levels of the clock signal on the XTALI pin should be as follows: Low logic level is 0.0V to 0.2V, High logic level is 0.8*NVCC_PLL_OUT to NVCC_PLL_OUT. The typical NVCC_PLL_OUT value is 1.1V.


Have a great day,
Artur

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NXP TechSupport
NXP TechSupport

There is no reference schematic by Freescale that shows the use of 24MHz oscillator with i.MX6 series processors. However, it is possible to use an external 24MHz oscillator as a main clock source for i.MX6 series processors. In that case, the basic requirements are as follows.

1. Connect the output of 24MHz oscillator to the XTALI pin of i.MX6, leave the XTALO pin floating.

2. The logic levels of the clock signal on the XTALI pin should be as follows: Low logic level is 0.0V to 0.2V, High logic level is 0.8*NVCC_PLL_OUT to NVCC_PLL_OUT. The typical NVCC_PLL_OUT value is 1.1V.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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View solution in original post

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Contributor V

Dear Artur-san,

Thank you for your support.

Can NVCC_PLL_OUT be used as a power supply to 24MHz oscillator?

Best Regards,
Yuuki

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NXP TechSupport
NXP TechSupport

The NVCC_PLL_OUT pin is not meant to feed any external load. So, you have to use an external power supply to feed an oscillator and then use NVCC_PLL_OUT voltage as a reference for level shifting circuit to get the resulting clock signal within the required level margins.


Have a great day,
Artur

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