About a delay of the parallel output VSINC for EXT_VSYNC for i.MX6

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About a delay of the parallel output VSINC for EXT_VSYNC for i.MX6

967 次查看
yuuki
Senior Contributor II

Dear all,

We want to use external LCK and VSYNC.

In this case, we think that the IPU of i.MX6 makes a VSYNC of the output by using EXT_CLK and EXT_VSYNC.
And we understand that the actual output VSYNC delays from EXT_VSYNC.

Would you tell me the delay of actual VSINC for EXT_VSYNC?
(For example, 10 pixels or 20 pixels etc.)

Best Regards,
Yuuki

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904 次查看
igorpadykov
NXP Employee
NXP Employee

Hi Yuuki

EXT_VSYNC,EXT_CLK are not routed externally for i.MX6.

EXT_CLK is connected internally as shows

Table 18-3 : ipp_di_ _ext_clk connected to ipu_di_clk_root.

Best regards

igor

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