About OVERRIDE bit in PMU_REG_1P0Dn register of i.MX7D

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About OVERRIDE bit in PMU_REG_1P0Dn register of i.MX7D

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takayuki_ishii
Contributor IV

Hello community,

 

I have one question about PMU_REG_1P0Dn register of i.MX7D.

section "5.4.5.2 Anadig 1.0V D Regulator Control Register" of Reference manual,

 

It have OVERRIDE bit in bit 31 of PMU_REG_1P0Dn register,

but the only explanation is the description of register bit field.

First of all, what purpose is OVERRIDE bit used for?

 

If OVERRIDE=1, the set voltage will be output from the LDO even though ENABLE_LINREG=0.

Is this correct behavior?

 

Best regards,

Ishii.

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JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

Yes, it does. You could try to use memtool to read it.

Best regards.

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JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

When OVERRIDE bitfield of PMU_REG_1P0Dn register is set, GPC will be able to modify PMU_REG_1P0Dn bitfields automatically.

ENABLE_LINREG will have the same behavior but, GPC can enable/disable regulator output.

Best regards.

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takayuki_ishii
Contributor IV

Hello @JorgeCas ,

 

Thank you for your reply.

 

You say that

GPC will be able to modify PMU_REG_1P0Dn bitfields automatically.

In this time, does PMU_REG_1P0Dn register value change and could it read from CPU?

 

Best regards,

Ishii.

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JorgeCas
NXP TechSupport
NXP TechSupport

Hello,

Yes, it does. You could try to use memtool to read it.

Best regards.

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takayuki_ishii
Contributor IV

Hello @JorgeCas 

 

Thank you for  your quick reply.

I will try to check register value.

 

Best regards,

Ishii.

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