About OE assertion period of EIM in i.MX6DQ.

[keitanagashima]

Dear All,

Hello. 

Refer to description of "OEA" bit in EIM_CSnRCR1 register on IMX6DQRM (Rev.3).

"In muxed mode OE assertion occurs (OEA + RADVN + RADVA + ADH +1) EIM clock cycles from start of access."

But, my customer measured the OEA signal on their custom board.

The result was (OEA + RADVN + RADVA + ADH + BCD + BCS +1).

On the other hand, refer to description of "RADVN" bit.

"ADV negation occurs according to the following formula:
(RADVN + RADVA + BCD + BCS + 1) EIM clock cycles from start of access."

[Question]

Is the following formula right?

"OE assertion = OEA + RADVN + RADVA + ADH + BCD + BCS +1"

i.e) is the description of Reference Manual typo?

Best Regards,

Keita

[Yuri]

Hello,

  Yes, the BCD should be taken into account ; please refer

to definition of parameter WE10 (Clock rise to EIM_OE_B valid)

in the Datasheet :

min = -0.5 × t × (k+1) - 1.25 ;

max = -0.5 × t × (k+1) + 2.25,

  where k represents register setting BCD value.

Have a great day,

Yuri

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[keitanagashima]

Hi Yuri,

Thank you for your reply.

Let me confirm again.

The "BCS" parameter should be considered, isn't it?

Best Regards,

Keita