About ODT setting for DRAM_SDQS0 and DRAM_SDQS1 of i.MX6Solo

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About ODT setting for DRAM_SDQS0 and DRAM_SDQS1 of i.MX6Solo

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Contributor V

Dear all,

I want to set ODT for DRAM_SDQS0 and DRAM_SDQS1.
However, ODT[10:8] field of the IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQSx_P register is Read Only.

Can we set OTD for DRAM_SDQS0 and DRAM_SDQS1?

If it is possible, would you tell me the register name and field?

Best Regards,
Yuuki

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NXP TechSupport
NXP TechSupport

Hello,

   Look at https://community.nxp.com/message/863150 

Have a great day,
Yuri

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NXP TechSupport
NXP TechSupport

Hello,

   Look at https://community.nxp.com/message/863150 

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

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