About Linitation of the VPU function of iMX6 Solo

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About Linitation of the VPU function of iMX6 Solo

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yuuki
Senior Contributor II

I referred to the following manual.

i.MX 6Solo/6DualLite Applications Processor Reference Manual Rev.1, 04/2013
- Table 9-8. VPU decoding/encoding capabilities(P.479)
- Table 69-1. Supported Decoding/Encoding Standards(P.5681)

About the profile indicated here,
Do these have any HW Limitation?

For example,
Can VPU of i.MX6Solo decode any files encoded by H.264_BP?


Best Regards,
Yuuki

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igorpadykov
NXP Employee
NXP Employee

HI yuuki

Table 69-1. Supported Decoding/Encoding Standards

shows supported formats without HW limitations, only limitation

may be fps, usually it is 30fps in software BSPs (depends on board configuration

and porcessor loading). Also I would suggest to check below presentations for more

deep learning (one can ask local FAE for access)

FTF-CON-F0165Video and Image Codec and Data Pipeline for the i.MX 6 Series

FTF-CON-F0223Simplify Graphical User Interface and Video Integration for i.MX 6 Series Processors

http://www.freescale.com/files/abstract/overview/DWFREESCALE_OLL_ABS.html

Best regards

igor

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yuuki
Senior Contributor II


Dear Igor-san,

In addition,
Would you teach the following contents?


1, Does VPU support all the motion compensation block sizes?
2, Does VPU support a multi-reference?
3, Does VPU support all nine Intra Prediction?

Best Regards,
Yuuki Murasato

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