About DDR3 Vref current consumption in i.MX6DQ.

[keitanagashima]

Dear Sir or Madam,

I have questions about Vref current consumption in i.MX6DQ.

My customer will tie DDR_VREF to a precision external resistor divider.

[Q1]

We referred to the Table 2-1. DDR recommendations, Table 2-15. DDR Vref resistor sizing guideline in i.MX6DQHDG(Rev.1).

The input current on DRAM_VREF pin became microampere order when computing by this way of external resistor divider.

But, the i.MX6DQ's Vref requires max "1mA" from Table 8. Maximum Supply Currents in IMX6DQCEC(Rev.4).

In case of using way of external resistor divider for VREF, how much current is i.MX6 Vref necessary actually?

[Q2]

Do you have the spec of IIH and IIL for DRAM_VREF pin?

[Q3]

Do you have the document of external resistor divider technique?

Best Regards,

Keita

[Yuri]

Hello,

The current requirements for VREF are relatively small, at less than 3 mA (totally). This reference provides
a DC bias of (VDD/2) for the differential receivers at both the controller interface and the DDR devices.

Noise or deviation in the VREF voltage can lead to potential timing errors, unwanted jitter, and erratic

behavior on the memory bus. To avoid these problems, VREF noise must be kept within the JEDEC

specification (+/-1% VDD, +/- 15 mV). Strictly speaking, taking into account, that maximum current
consumption of 1 mA for i.MX6 DRAM_VREF, it would better to use an external VREF supplier instead
of resistor divider. For the resistors case VREF supply will be high in order to get the needed accuracy.

Have a great day,
Yuri

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[keitanagashima]

Hi Yuri,

I have additional questions.

[Q1]

> The current requirements for VREF are relatively small, at less than 3 mA (totally).

Even if one placed a bleeder-resistance individually with the CPU and DDR3, It isn't possible to satisfy this value with external resistor divider.

Could you give me the actual (typical) value of IIH and IIL for DRAM_VREF pin?

[Q2]

> Noise or deviation in the VREF voltage can lead to potential timing

> errors, unwanted jitter, and erratic

> it would better to use an external VREF supplier instead of resistor divider.

> For the resistors case VREF supply will be high in order to get the

> needed accuracy.

> To avoid these problems, VREF noise must be kept within the JEDEC

> specification (+/-1% VDD, +/- 15 mV).

We think that VREF(VDD/2) must track the change of VDD which contained these noise with real time.

If observing resistance precision (+\-0.1%) strictly, we think that the tracking precision of external resistor divider is better than external VREF supplier's one.

How about you?

Best Regards,

Keita

[Yuri · Accepted solution]

Hello,

1.

  IIH and IIL for DRAM_VREF are not specified

2.

>   [...] we think that the tracking precision of external resistor divider
> is better than external VREF supplier's one.

Yes. The only issue is possible high consumption in case of the divider.

Regards,

Yuri.