Hello,Community
I have two main questions.
1.There are the following four CMD DESKEW Control Registers in the i.MX 7Dual Applications Processor Reference Manual.
Is it a register that simply delays the output time?
DDR_PHY_CMD_DESKEW_CON0 ・ ・ ・ CA
DDR_PHY_CMD_DESKEW_CON1 ・ ・ ・ CA
DDR_PHY_CMD_DESKEW_CON2 ・ ・ ・ CS, CK, CA
DDR_PHY_CMD_DESKEW_CON3 ・ ・ ・ CS, CKE
DDR_PHY_CMD_DESKEW_CON4 ・ ・ ・ RST
2."https://community.nxp.com/message/879239" has the following description.
Can it be applied to all the above signals?
One delay value in this register is ~ 16.3 picoseconds
The register field values of 0x00-0x08 add no delay.
For this, 0x08 is effectively the zero starting point.Every setting above 0x08 adds one tFS delay.For example, a value of 0x12 adds 10 * tFS or 163 picoseconds of delay.
best regards
Goto
Solved! Go to Solution.
Hello,
Yes, considerations in https://community.nxp.com/thread/445251
are correct.
Have a great day,
Yuri
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Hello,
Yes, considerations in https://community.nxp.com/thread/445251
are correct.
Have a great day,
Yuri
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.