About CTRL_DATA, CTRL_CLK and SYS_MCLK of SGTL5000

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About CTRL_DATA, CTRL_CLK and SYS_MCLK of SGTL5000

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yuuki
Senior Contributor II

Would you teach about CTRL_DATA, CTRL_CLK, and SYS_MCLK of SGTL5000?

I refer to SPF-26325_b1.pdf of iMX25_PDK_DesignFiles.
According to this schematic, 1.8V is supplied to VDDIO of SGTL5000.
(And 3.3V is supplied to VDDA.)

I understand that digital IO should be 1.8V signal.
However, CTRL_DATA, CTRL_CLK, and SYS_MCLK are 3.3V signals.

I think that these should be 1.8V signals since these signals are digital IO.

Would you teach why these are 3.3V signals?
(Do these signals belong to a VDDA power supply?)

Best Regards,

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Yuri
NXP Employee
NXP Employee

Yes, the PDK scheme is incorrect regarding the mentioned signals : voltages of i.MX25 output and corresponding SGTL input signals are not matched. 

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Yuri
NXP Employee
NXP Employee

Yes, the PDK scheme is incorrect regarding the mentioned signals : voltages of i.MX25 output and corresponding SGTL input signals are not matched. 

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