ADV7441A Yocto and i.MX6

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ADV7441A Yocto and i.MX6

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jamiew
Contributor III

Hello

Has anyone got the ADV7441A working with Yocto & i.MX6?

I am trying to capture component video at 1920x1080p25 either using BT.1120 or separate HSYNC and VSYNC

I've written a driver (modified from the ADV7180) and I've manually applied the BT1120 patch I found in this forum to enable 16bit and 1120 but just capturing blank video.

I'd be interested to hear if anyone has used this device?

Thanks

Jamie

yuv.png

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21 Replies

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imreszegedi
Contributor I

Hello Jamie,

I am interested in making the ADV7441A work with the i.MX6 and I see that your question is flagged as answered. Does this mean that you could finally make it work? Could you please help me out by posting the final patches?

Thanks,

Imre

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ayhanyuksel
Contributor I

Hello Jamie,

I am currently struggling with the same thing, unfortunately i could not receive a picture at the moment.

My setup is:

HDMI source (720P) --> ADV7441A board --> IMX6 Board (Variscite) IMX CSI-1 Input (CSI19:CSI0 + HS+VS + PixCLK) --> Gstreamer tvsrc ! autovideosink --> HDMI Out --> HDMI monitor

I am getting nearly  an output like yours. But, If I remove the EAV/SAV codes with I2C command (ADV7441 user map, register 0x7B) , My output becomes pure green (no noise). Then, I checked with a logic analyser. I saw PixCLK, HS and VS. But there is no Pixel data. I think there must be an I2C register setting to drive Data output of ADV7441.

Please let me know, if you get success

Ayhan

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jamiew
Contributor III

Hi Ayhan

We have found some issues with our connections which will solve some of our problems so waiting for board mods before continuing. These are the settings I am using with the ADV7441A:-

i2cset -f -y 2 0x20 0x03 0x08

i2cset -f -y 2 0x20 0x05 0x01

i2cset -f -y 2 0x20 0x06 0x0A

i2cset -f -y 2 0x20 0x1D 0x40

i2cset -f -y 2 0x20 0x3C 0xA8

i2cset -f -y 2 0x20 0x47 0x0A

i2cset -f -y 2 0x20 0x6B 0xD3

i2cset -f -y 2 0x20 0x85 0x19

i2cset -f -y 2 0x20 0xBA 0xA0

i2cset -f -y 2 0x20 0xC3 0x31

i2cset -f -y 2 0x20 0xC4 0x82

Also if you read back the status using

i2cget -f -y 2 0x20 0x12 b

Bit 6 should be 0 if valid video is seen by the ADV7441A

I do now get a picture but we have some bit ordering issues. Also i'm only getting every other byte (just U and V but not Y) so I guess the driver is still in 8 bit mode somehow.

Good luck

Jamie

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jamiew
Contributor III

Also worth mentioning if you try using the unit tests you need to force YUYV:-

./mxc_v4l2_tvin.out -iw 1280 -ih 720 -ow 1280 -oh 720 -f YUYV -fr 30

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ayhanyuksel
Contributor I

Hi Jamie,

I also succeed to get a picture, my problem was field signal polarity (0x7c) I do get a video (colours are not correct however).  Also, I think I have some issues about connections or v4l2 configuration in the driver. I applied the sii9135.patch (but not sure if it was necessary), I am trying gated mod or BT1120 modes, It doesn't mater whether using sync signals or not.

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jamiew
Contributor III

Hi Ayhan

A tool I've been using for working out what format the colour is in is YUVPlayer. I save the data from the V4L buffer to disk as it was captured (just for a frame) then open in YUVPlayer and you can then interpret the data in any way you want.

YUV Player download | SourceForge.net

Also worth noting, for my 1280x720 image the actual width of the raw data was 1648 (using HSYNC VSYNC as my bit ordering problems have broken the EAV/SAV).

Jamie

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ayhanyuksel
Contributor I

Hello Jamie,

Thank you for suggestions.

Now, I finally get a brilliant image on the LCD screen.

What i did is:

- I applied sii9135 patch for BT1120 patch and my mxc_v4l2_capture c mxc_v4l2_s_param function looks like:,

.......

csi_param.data_en_pol = 1;

.....

    if (ifparm.if_type == V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDR) {

        csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR;

        csi_param.data_width = IPU_CSI_DATA_WIDTH_8;

    } else {

.....

- Also important register settings for ADV7441:

0x21 0x05 0x06

0x21 0x06 0x02

0x21 0x6b 0xc3

0x21 0x7b 0x0f

- DE pin is unconnected (or it should be high) and polarity was set 1 in as above

- pin connections: Vout19-Vout12  <--->  CSI D19 - CSI D12     &  Vout9-Vout2  <--->  CSI D9 - CSI D2  (HS & VS is connected but they are not being used, i think)

- pipeline is simply:

gst-launch-0.10 tvsrc ! autovideosink

- I used 1280x720 resolution, not tried for other resolutions and my driver always gives this resolution

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jamiew
Contributor III

Hello Ayhan

What settings do you use for your v4l2_ifparm in your driver file? I have

p->if_type = V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDR;

p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_BT_8BIT;

p->u.bt656.bt_sync_correct = 1; // 0=use VSYNC 1=use BT codes

It seems I'm only getting Y values and not U or V and it's failing to sync properly too. It's like I'm only getting half the data.

Thanks

Jamie

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qiang_li-mpu_se
NXP Employee
NXP Employee

For BT1120 16bits progressive setting, you need check the CSI register (IPU_CSI_SENS_CONF) setting as followed:

CSI_EXT_VSYNC: 0 Internal VSYNC mode (If there is no VSYNC and HSYNC pin connected)

CSI_DATA_WIDTH: 0001 8 bits per color (For BT1120 mode, it is not 16 bits per color)

CSI_SENS_DATA_FORMAT: YUV422

CSI_SENS_PRTCL: 101 CCIR progressive SDR

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jamesbone
NXP TechSupport
NXP TechSupport

Hello Jamie,

Which patch are you referring?   Do you check this thread, unknown

Patch to Support BT656 and BT1120 Output For i.MX6 BSP

Here are some updates made by Qiang_FSL

ADV7181 on IMX6Q board

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jamiew
Contributor III

Hi James

Thanks for your answer the patch is from Support BT1120 progressive mode in Mx6Q

As I think the one you refer to is for output (to a display) not input from a frame grabber.

I had seen the ADV7181 thread before but looks like it's worth reading through again.

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Lamie,

Can you attach your patch here?

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jamiew
Contributor III

Hi Qiang

The patch is https://community.freescale.com/servlet/JiveServlet/download/356584-266945/sii9135.patch.txt.zip from ShaojunWang

From the sii9135.patch

I added the csi0_D2-7 sensor pads to my board file (board-bctrm3.c)

The changes to arch/arm/plat-mxc/include/mach/ipu-v3.h were already there in the Bluechip kernel https://github.com/bluechiptechnology/Rx3_linux_3.0.35_4.0.0

I added the ADV7441A to drivers/media/video/mxc/capture/Kconfig, drivers/media/video/mxc/capture/Makefile & also to include/media/v4l2-chip-ident.h

I made the changes from the patch to

drivers/media/video/mxc/capture/mxc_v4l2_capture.c

I added a new file (not from patch)

drivers/media/video/mxc/capture/adv7441a.c

I made the changes to drivers/mxc/ipu3/ipu_capture.c although they were only printks

And also made the changes to include/media/v4l2-int-device.h

The file adv7441a.c is a copy of adv7180.c where I have searched and replaced 7180 with 7441. I have hard coded it to 1920x1080 for now and removed some of the code from the 7180 but there is still quite a bit of unused code in there so the main 7441a specific code is adv7441_1080P_25HZ_16() which should set the 7441a into the required mode.


Thanks for your help


Jamie

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Jamie, it seems your input is not prograssive, it is BT1120 interlaced input. So for IPU side code, you should add more code to support it.

Some IPU BT1120 interlaced code can be found from Re: Patch to support adv7180 TVin chip for Freescale Android R10.4 BSP on iMX53 -blog archive

Although it is verified on iMX53, the code can also be used on iMX6.

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jamiew
Contributor III

Hi Qiang

Thanks for your answer looking through the 7180 patch it seems it's already in the kernel I'm using. As well as anther board I have with an interlaced source from ADV7180 working fine.

I've set the input to be 720p60 and have had some help from Analog Devices setting up the ADV7441A. So I can see it is now outputting data. However I seem to be having some problems with the format.

In my adv7441a.c file I set:-

p->if_type = V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDR;

p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT;

p->u.bt656.bt_sync_correct = 1; // use external VSYNC

I can't help feeling there should be a 16bit version of V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT ?

Thanks

test2.png

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qiang_li-mpu_se
NXP Employee
NXP Employee

For "V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT", it was used to make the driver set CSI_DATA_WIDTH to 8 inregister IPU_CSI_SENS_CONF.

By the way, did you test withe the mxc_v4l2_tvin test application?

Maybe you can also have a try to increase the drive stregth for the CSI pins.

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jamiew
Contributor III

Thanks Qiang I'll look at drive strength options.

I can't use the mxc_v4l2_tvin test as I don't have a display. The final application will stream over ethernet.

In the meantime I've changed mxc_v4l2_capture.c:-

if (ifparm.if_type == V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDR) {

// code as it was csi_param.data_width = IPU_CSI_DATA_WIDTH_8;

  csi_param.data_width = IPU_CSI_DATA_WIDTH_16;.....

Which has made a difference to the output (which I save to disk as raw bytes captured by v4l and then download via SCP):-

enlarged.png

     (crop magnified x4)

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Jamie, for BT1120 interface, you should not set IPU_CSI_DATA_WIDTH_16, it is wrong.

By the way, since you had used ethernet to transfer the data, did you encode it? I think you should use mxc_v4l2_tvin.c to test it, you can modify the code and let it save th captured video into file directly. The tvin test application will capture the raw image dirctly, then you can know if the data is correct or not.

For encoding, it needs YUV420 format data, so if the input is UYVY, you need convert it to YUV420, then encode it. If you used the UYVY data for encoding, the image will be wrong.

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jamiew
Contributor III

Hi Qiang

After looking at the binary data captured it seems there are SAV and EAV codes in it. There are FF 00 00 67 and FF 00 00 20 at regular intervals. However they are only 1284 bytes apart. So for 1280 wide 16bit data this seems far too small. Also should the codes not have been stripped out with the non active video area by the IPU before the data gets to V4L?

Thanks

Jamie

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qiang_li-mpu_se
NXP Employee
NXP Employee

You can use internal vsync mode to skip the EAV/SAV:

In your adv7441a.c:

p->u.bt656.bt_sync_correct = 0; // use internal VSYNC

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