HI,
we have connected the ADV7280 with imx6 dual lite by using csi0 parallel interface, we are using ADV7180 driver for initializing the ADV7280 chip.
we are using the below command to capture and show into the display, when ever we will pass the command we are getting the clock of 28.6MHz on crystal and LLC 4MHz and "we are able to see the data on the camera data out lines (on 8 data lines)."
"gst-launch-1.0 -v imxv4l2src device=/dev/video0 ! imxv4l2sink"
the below error we are getting while while pass the command.
"ERROR: v4l2 capture: mxc_v4l_dqueue timeout enc_counter 0"
The dts file configuration is as below.
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
adv7180: adv7180@20 {
compatible = "adv,adv7180";
reg = <0x20>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1_csi0>;
clocks = <&clks IMX6QDL_CLK_CKO>;
clock-names = "csi_mclk";
DOVDD-supply = <®_3p3v>; /* 3.3v, enabled via 2.8 VGEN6 */
AVDD-supply = <®_3p3v>; /* 1.8v */
DVDD-supply = <®_3p3v>; /* 1.8v */
PVDD-supply = <®_3p3v>; /* 1.8v */
pwn-gpios = <&gpio6 4 GPIO_ACTIVE_LOW>;
/* reset-gpios = <&gpio6 3 GPIO_ACTIVE_LOW>;*/
csi_id = <0>;
mclk = <24000000>;
mclk_source = <0>;
cvbs = <1>;
};
};
v4l2_cap_0 {
compatible = "fsl,imx6q-v4l2-capture";
ipu_id = <0>;
csi_id = <0>;
mclk_source = <0>;
status = "okay";
};
v4l2_out {
compatible = "fsl,mxc_v4l2_output";
status = "okay";
};
pinctrl_ipu1_csi0: ipu1csi0grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x1b0b0
MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x1b0b0
MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x1b0b0
MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x1b0b0
MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x1b0b0
MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x1b0b0
MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x1b0b0
MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x1b0b0
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
>;
};
Could you please provide any suggestions to resolve this issue .
Thanks and regards,
shivasagar.