A7 and M4 min. core operating freq.

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A7 and M4 min. core operating freq.

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sunildhaduk
Contributor IV

Hello,

What is A7 minimum core operating freq. supported in iMX7S and iMX7D?

What is M7 minimum core operating freq. supported in iMX7S and iMX7D?

What is the lowest LPDDR3 memory operating frequency supported in iMX7S and iMX7D?

Also, let me know how to achieve above all lowest operating frequencies (like PLL, N/M settings etc.)

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Carlos_Musich
NXP Employee
NXP Employee

Hi Sunil,

please check page 481 of the Reference Manual - http://www.nxp.com/files/32bit/doc/data_sheet/IMX7SCEC.pdf?fasp=1&WT_TYPE=Data%20Sheets&WT_VENDOR=FR... 

Here you will find Table 5-11. Clock Root Table which indicates that both, A7 and M4 can use as source the 24MHz oscillator which is not divided.

On the other side, in page 453 ya can find Figure 5-2. PLL and PFD which indicates that the minimum DRAM_PLL input frequency is 800MHz and it can be divided by 2.


Regards,
Carlos

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sunildhaduk
Contributor IV

If I use 24MHz oscillator as clock source for A7 and M4 then there is 3-bit post divider on clock root for both A7 and M4 (Reference iMX7DRM.pdf Page-505).

So, in this case, minimum clock freq. will be 3MHz for A7 and M4 if i set post clock divider value = 8.

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Carlos_Musich
NXP Employee
NXP Employee

You are right Sunil,

You can do this with POST_PODF field in CCM_TARGET_ROOTn register. This field is 6 bit but for core and DRAM it is only 3 bit.

Sorry for the confusion.

Regards,

Carlos

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