8MMINILPD4-EVK Schematic question for note on pull up/down

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8MMINILPD4-EVK Schematic question for note on pull up/down

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jefflfree
Contributor III

There is a note about "IO internal pull up/down is not supported in 3.3V mode, must disable the internal pull up/down via software and use external pull up/down resistors instead.". What is the default? And how are these to be disabled?

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Jeff Freeman,

Details on the reason behind this note can be found on the i.MX8MM Erratum e50080 (link below, you may need to login to download this file).

https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W

The default configuration for most pins is the resistor pull enabled so you would need to disable these. You can see the default configuration for each pin on the  i.MX8MM Reference Manual (link below) on each of the pads registers. The variable is PE (Pull Resistors Enable Field)

https://www.nxp.com/webapp/Download?colCode=IMX8MMRM

I hope this helps!

Regards,

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Jeff Freeman,

Details on the reason behind this note can be found on the i.MX8MM Erratum e50080 (link below, you may need to login to download this file).

https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W

The default configuration for most pins is the resistor pull enabled so you would need to disable these. You can see the default configuration for each pin on the  i.MX8MM Reference Manual (link below) on each of the pads registers. The variable is PE (Pull Resistors Enable Field)

https://www.nxp.com/webapp/Download?colCode=IMX8MMRM

I hope this helps!

Regards,

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