8MMINI-BB design files:some context information desired

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8MMINI-BB design files:some context information desired

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rjm
Contributor III

For a customer, I'm going to design an application board for 8MMINI SoM. This design shall be based on the evaluation kit base board and it's schematic and design files. As such, OrCad usage is intended.

I'd appreciate it to get some contextual information regarding the layout of the Base Board. I.e. was it fully or partially autorouted; are 8 layers considered necessary (e.g. related to EMI) or has it been a standard process just to simplify routing & ensuring standards compliance without the need of truly conscious application of EMI-compliant routing? Why are four oblong holes present precisely underneath of the location of the MCU on the SoM on top of the BB?

Such an information makes sense because it aids in doing appropriate decisions towards a new product that not only is technically good, but also related to cost of PCB resp. assembly.

An information just like the "i.MX 8M Mini Hardware Developer’s Guide" could help as well, but this document actually addresses  the core circuit around the MCU (with RAM etc.), which is not needed, because an existing SoM-design will be used.

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art
NXP TechSupport
NXP TechSupport

8 layers PCB design is just a good design practice to keep the trace impedance matching and reduce EMI.

Four holes near the CPU package corners on the i.MX8MMini EVK CPU board are provided for potential heat sink installation.

Best Regards,
Artur

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art
NXP TechSupport
NXP TechSupport

8 layers PCB design is just a good design practice to keep the trace impedance matching and reduce EMI.

Four holes near the CPU package corners on the i.MX8MMini EVK CPU board are provided for potential heat sink installation.

Best Regards,
Artur

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