800x480 HDMI support on iMX8MQ

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800x480 HDMI support on iMX8MQ

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N_Coesel
Contributor III

I have an 800x480 HDMI display but it doesn't work on the iMX8MQEVK. I get the following console output:

[  221.421192] [drm] HDMI/DP Cable Plug In
[  221.436809] i.mx8-hdp 32c00000.hdmi: 0,ff,ff,ff,ff,ff,ff,0
[  221.450672] [drm] Link rate is too high - forcing link to lower rate
[  221.457202] [drm] Pixel clock frequency: 172780 KHz, character clock frequency: 172780, color depth is 8-bit.
[  221.467385] [drm] Pixel clock frequency (172780 KHz) not supported for this color depth (8-bit)
[  221.476375] [drm:hdmi_phy_init_t28hpc] *ERROR* failed to set phy pclock
[  221.483143] [drm:imx_hdp_mode_setup] *ERROR* Failed to initialise HDP PHY
[  221.493894] dcss-core 32e00000.dcss: Configured video pll 2 with ref_clk 2 freq 172780000 (actual 172799998)
[  221.503829] dcss-core 32e00000.dcss: pixel clock set to 172799998 Hz instead of 172780000 Hz, error is 19998 Hz

When enabling the debugging on DRM I see the following in the DMESG output:

[  221.421192] [drm] HDMI/DP Cable Plug In
[  221.424751] [drm:drm_ioctl] pid=3257, dev=0xe201, auth=1, DRM_IOCTL_MODE_GETRESOURCES
[  221.424763] [drm:drm_mode_object_put] OBJ ID: 46 (4)
[  221.424774] [drm:drm_ioctl] pid=3257, dev=0xe201, auth=1, DRM_IOCTL_MODE_GETRESOURCES
[  221.424781] [drm:drm_mode_object_put] OBJ ID: 46 (4)
[  221.424794] [drm:drm_ioctl] pid=3257, dev=0xe201, auth=1, DRM_IOCTL_MODE_GETCONNECTOR
[  221.436809] i.mx8-hdp 32c00000.hdmi: 0,ff,ff,ff,ff,ff,ff,0
[  221.442407] [drm:imx_hdp_connector_mode_valid] pixel clock 32000 out of range
[  221.442412] [drm:imx_hdp_connector_mode_valid] pixel clock 172780 out of range
[  221.442421] [drm:drm_mode_object_put] OBJ ID: 46 (4)
[  221.442431] [drm:drm_ioctl] pid=3257, dev=0xe201, auth=1, DRM_IOCTL_MODE_GETCONNECTOR
[  221.442439] [drm:drm_mode_object_put] OBJ ID: 46 (4)
[  221.442450] [drm:drm_ioctl] pid=3257, dev=0xe201, auth=1, DRM_IOCTL_MODE_OBJ_GETPROPERTIES

The pixel clock of 32MHz (32000kHz) is correct for an 800x480 @60Hz display so the EDID data seems to be interpreted correctly however it appears there is a limit on the pixel clock. How can this be fixed?

9 Replies

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94393400
Contributor III

Hi Nico Coesel

     Do you have finished this problem? how to fixed it , our project use 2K HDMI output, and have the same issue as yours.

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Sanjay_Pandey1
Contributor II

The best way is to put 2KB Flash on the HDMI i2c and program it with the EDID to support   800x480 HDMI support . I have tested it and its work for me. 

You can check the bellow link for  description along with  source for ESP32  to programe flash  

https://learn.adafruit.com/adafruit-tfp401-hdmi-slash-dvi-decoder-to-40-pin-ttl-display/editing-the-...

 

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N_Coesel
Contributor III

The problem was in the EDID data of the display.

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N_Coesel
Contributor III

Just to add some clarification. I want to use the TI TFP401 to convert to parallel display data which can then be converted to LVDS. The idea behind this is not having to mess with different display outputs since the final product is supposed to support HDMI as well. I'm using this ( https://learn.adafruit.com/adafruit-tfp401-hdmi-slash-dvi-decoder-to-40-pin-ttl-display  ) board from Adafruit because it uses the TFP401 chip and serves as a cheap & easy eval. kit. To check whether the board works and has the right EDID data I have connected the  board (with the display connected) to my laptop and that works plug & play. So it seems the software on the iMX8 side isn't handling the EDID data properly.

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diegoadrian
NXP Employee
NXP Employee

Hello, 

Unfortunately, we are not able to assist you since this converter is not supported by our BSP.  The problem seems to be an incompatibility with the operation frequencies, you can modify the driver by your own to make it work, or you can go with professional services support, they could help you with your problem. 

https://contact.nxp.com/CAM802_PRO_SVCS

I apologize for the inconveniences that this could give you.

Best regards,

Diego.

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N_Coesel
Contributor III

Well I would expect a HDMI implementation to read the EDID data and create the proper timings for the display (regardless of the display geometry). This doesn't seem to happen and/or the supported display modes are very limited. Needless to say I'm very dissapointed the functionality of the HDMI driver is so limited. There is supposed to be EDID support (I have it enabled in the kernel) but this doesn't seem to work at all. When I provide no video mode on the kernel command line I get the message '[drm] Cannot find any crtc or sizes'.

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N_Coesel
Contributor III

Meanwhile I tested using a generic 1024x768 HDMI monitor but that doesn't work either. The display says it is receiving a 2880x (can't read further) resolution and the output on the console port says the color depth is 12 bit.

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N_Coesel
Contributor III

Quick update: it turns out the display has an EDID quirk so it didn't register itself the right way. I have managed to get it going in a resolution other than 1920x1080 but I still have the feeling the part which deals with the video mode settings can use some tweaking.

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lee3
Contributor I

Hi Nico,

I have read various threads on this matter that seem to either go offline to email with the IMX Expert group or end with no comment from NXP.

We're using a TechNexion IMX8MQ flavored board and we've looked at various distros and hacks but ....

Diego says "you can modify the driver by your own to make it work" 

Diego please explain.

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