Hi,
We're developing a 6sl based board with eMMC. That will use MTFC16GAKAECN-2MM which is a eMMC 5.0 part.
I'm trying to make sure that my boot strapping settings and software changes are correct for that. Here's what I've worked out:
a) booting from eMMC on SD2
BOOT_CFG1=01_1_0_11_0_0=0110_1100
[7:6]=01 - boot from usdhc
5=1 - emmc
4=0 - normal boot. I chose normal boot rather than fast boot due to
concern that fast boot doesn't work.
https://community.nxp.com/thread/430503
[3:2]=11 - normal speed mode with fast boot acknowledge disabled. I'm
not 100% sure about this as I see conflicting comments in discussions
about this. https://community.nxp.com/thread/429618
1=0 - no power cycle. I'm unsure about this one. The spec says RST is
only for SD3 and SD4. But we know there is SD2_RST.
0=0 - clk through sd pad
BOOT_CFG2=010_01_0_0_0=0100_1000
[7:5]=010 - 8 bit. I chose 8-bit rather than 8-bit DDR due to concern
that 8-bit DDR won't work with emmc 5.0.
https://community.nxp.com/thread/384215
[4:3]=01 - uSDHC2 port
2=0 - 792 / 400 MHz
1=0 - 3.3V because MTFC16GAKAECN-2MM is 3.3V part.
https://www.micron.com/parts/nand-flash/managed-nand/mtfc16gakaecn-4m-it?pc=%7BA33DE227-FCAF-418F-9D...
b) software changes
I read EMMC 5.0 and EMMC 5.1 work on i.MX6 .
So my understanding is:
- changes to linux mmc driver drivers/mmc/core/mmc.c
u-boot no changes needed as long as using recent version.
Thanks,
jaya
Hello Jaya,
See following, please!
1. Boot configuration select
I checked your boot configuration select, they are all right.
2. About software
(1) Modifying mmc.c accroding to EMMC 5.0 and EMMC 5.1 work on i.MX6 .
right.
(2) u-boot
If you conntected eMMC Managed Nand Flash to SD2 port, you should make SD2 work at 8bit mode, but in u-boot source code(mx6slevk.c), SD2 port is defined as 4bit mode:
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
/*CD pin*/
MX6_PAD_SD2_DAT7__GPIO_5_0 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
So you should also multiplex USDHC2_DAT4~USDHC2_DAT7 pins here like below:
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT3__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT3__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT3__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD2_DAT3__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
/* No CD pin for eMMC, so delete it */
};
3. Suggestions for you
(1) burning images
In order to debug borad conveniently, you can only burn u-boot into eMMC by MFG Tools, After u-boot can noramlly boot your board, burn all images into eMMC.
(2) boot_mode[1:0]
Pay attention to these 2 pins, please! burning mode and internal boot mode must be configured through these 2 pins. see 6sl reference manual( boot mode chapter)
--Burnning mode( Serial Downloader ) : boot_mode[1:0]=01
--Internal mode(boot from Flash on board) : boot_mode[1:0]=10
Have a great day,
(weidong sun)
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