we are planning to design iMX6 Quad with 4GByte DDR3 and Solo with 2GB DDR3 using MT41K512M16 (twin die DDR3L).
so we decided to use DRAM_CS0 (Y16) & DRAM_CS1( AD17) of iMX6.
we feel better if we get application note / reference design for this.
is there any reference schematics with 4GB DDR3 for imx6?
As I see that many people would like to use 8 Gigabit DDR3 devices in their designs, I would like to update you with the current market situation, because there are lots of changes with the worldwide shortage on memory:
8 Gigabit "Twin-Die" or "Dual Die" components - having two chip-select pins - have in the past been available from Micron (MT41K512M16TNA) , Samsung (K4B8G1646D) and Hynix (H5TC8G63CMR).
But all these three manufacturers went End-of-Life or are short before their Last Time Buy Date.
2 years ago Micron also came up with a monolithic - single chip select - device MT41K512M16HA, but seems to no longer offer these in the industrial temperature range that many NXP users need. Per Microns website the Industrial Temperature devices are shown as "Contact Factory" which is a sign that they are not eager to take new orders.
8 Gigabit DDR3/DDR3L components are important not only for iMX6 users, but for the whole NXP user community.
Here is the good news:
A few week ago, Intelligent Memory (IM) announced the release of a brandnew series of 8Gb DDR3 components.
See this Link to the press release
IM has 8Gb in x16 (BGA96), but also in x8 (BGA78).
And they have BOTH, Dual Die parts with two chip-select pins, and also single-CS parts. All 8Gb DDR3 are also orderable with industrial temperature range.
x16 1CS IM8G16D3FCB
x16 2CS IM8G16D3FCD
x8 1CS IM8G08D3FCB
x8 2CS IM8G08D3FCD
Furthermore, Intelligent Memory mentioned to be working on 16 Gigabit DDR3 Dual-Chip-Select parts to become available starting in Q3/2018. This is a good sign that there will be longevity for DDR3 in general!
There is one other manufacturer left having 8Gb "Dual Die" DDR3 parts which is ISSI. However, the pricing seems to be quite a bit higher than that of IM from what I heard. ISSI is also about to release a new Single-CS 8Gb DDR3 device soon, but please watch the chip-dimensions! The BGA package size seems very huge per their datasheet.
Unfortunately no twin-die DDR3 configuration has been tested with the i.MX6 processor.
There are two main resources for DDR implementation:
Hardware Development Guide for i.MX 6 (link below)
Application Note 4467, i.MX 6 Series DDR Calibration (link below)
There is also the SABRE board schematic which you may use as reference although it does not provide information on twin-die configuration.
Even though the twin-die configuration has not been tested it’s theoretically possible as long as it adheres to the DDR standard - which is the case of MT41K512M16 so it should work. That being said, if in doubt I would suggest using single chip DDR memories as it implementation has been proven and there is much more information regarding layout design and calibration.
Thank you All
We already designed a imx6 based SOM module using single core chip DDR3L , Micron's MT41K256M16JT-125 IT (single die) part.
1. Using 4 number of MT41K256M16JT-125 IT chips we achieved 2GB DDR3 Memory space for Quad processor
2.And in the same design,we mounted only 2 number of MT41K256M16JT-125 IT chips and we achieved 1GB DDR3 Memory space for Solo processor.
we referred free scale's SPF-27392_C3 schematics as reference for above design. Thanks to freescale.
Now we would like to expand the DDR3L Memory size using MT41K512M16 (twin die DDR3L) in the existing design itself.
Hence in the same board design with small modification we can acheive 1GB /2GB DDR3 size for solo processor by mounting 2 number of MT41K256M16JT-125 IT / MT41K512M16 respectively.
And 2GB/4GB DDR3 size for Quad processor by mounting 4 number of MT41K256M16JT-125 IT / MT41K512M16 respectively.
Now I believe AD17 AA11 AB17 are the additional three pads of iMX6 need to be connected to L1 , J9 and J1 of MT41K512M16 (twin die DDR3L) and J9 of MT41K512M16 should be pulled down with 240 ohm. ( BY referring free scale's SPF-27392_C3 schematics)
Thanks micron ! it already reserved these pads (L1 J9 J1 and L9 ) in MT41K256M16JT-125 IT (single die).
Can i proceed with the above modifications in SPF-27392_C3 to achieve 2GB/4GB DDR3 in solo/QUAD respectively..?
My apologies for the delay.
I’m glad that Micron had the good sense to make these memories pin compatible in terms of having these pins reserved on the single die option. It makes it much simpler!
As I mentioned I haven’t seen any twin-die configuration being tested but you are correct. The signals you listed would enable the second die of each memory chip. Just please double check the pull-down resistor as the DRAM_SDCKE0/1 pins should have a 10k pull down resistor.
I'm also planning on using 4 x MT41K512M16 to achieve 4GB on my Sabre based design. You have already saved me at least one re-spin. thank you.
From reading this post I've extracted the following hints
Do you have any other hints?
Also how did you configure the kernel/u-boot/device trees to use this new configuration?
Due to Some reason, my design was stopped and I didn't interface TWIN die DDR3L part( MT41K512M16 ) with SABER based Design . Now ( after 1.5 years) one of my iMX6 based product requires 4GB RAM. So again I am thinking to interface TWIN die DDR3L part with saber based design. In this 1.5 years , have any body interfaced Twin die DDR3L with iMX6 using 2 Chip select?
Any body have more information on this? NXP can you please help to complete my desing?