4 Channel 720P30 Video capture with single Soc

[shabbirlimdiwal]

Hi,

For one of the upcoming products, we are looking for right architecture to implement SVM (Surround view monitoring) system. There will be 4 cameras mounted on car's front, rear, left and right side and we want to design a host system which can capture 4 channel Bayer/YUV data (each 720P@30), stitch them together to create one 720P view to be displayed on dashboard.

Can you suggest Freescale SoC which is able to capture 4 simultaneous channel 720P@30 fps?

If I am not wrong, one i.mx6 can capture two 720P30 channels at max. What if I want to capture 4 channels (I am fine using either CSI/paralle/both interfaces to achieve this use case).

If single SoC can't do that, what are the possible ways to achieve this use case?

Regards,
Shabbir

[igorpadykov]

Hi Shabbir

i.MX6DQ has 2 IPU, each has 2 CSI parallel intefaces.

Below presentation gives brief description

A Deep Dive into Image Processing for i.MX 6 Series Applications Processors

Performance is given in IMX6DQRM 37.1.2.1.1 Camera Ports:

for parallel interface, the maximum speed of the interface is 240Mhz.

for MIPI for 4 data lanes configuration : 400MByte/sec

So only 2 cameras 720P@30 fps can be connected to 2 parallel CSI intefaces.

For MIPI, one will have to design fpga and multiplex four streams in one stream

with 400MByte/sec /4 = 100MByte/sec bandwidth available per one camera.

So for example with camera YUV422/16 bit/pixel, 720P30~ 30Mpix/sec-->

60MB/sec seems this is possible

Best regards

igor

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[shabbirlimdiwal]

Hi Igor,

If I understood correctly, you mean to say that four independent 720P30 parallel cameras can be connected to two parallel ports of Camera sensor interface without any FPGA/custom glue interface. Can you confirm my understanding ?

If yes, What I believe is two 16-bit parallel ports will be available as four 8-bit (BT656) parallel ports. Is that what you mean ? But I could not find four separate pixel clocks and pin out details for four 8 bit ports as VIN0[0] to VIN0[7] and so on till VIN3[0] to VIN3[7].

Please provide more information on how can I connect 4 8 bit parallel cameras (720P30) to the parallel interface of one i.mx6. I understood that for MIPI, we will need FPGA for 4:1 conversion of channels.

Regards,

Shabbir

[qiang_li-mpu_se]

Hi Shabbir, you can reference to this document for your use case. It can be supported.

Patch to support up to 4 cameras on iMX6DQ Linux BSP

[igorpadykov]

Hi Shabbir

sorry, I modified answer. For camera to CSI connections

one can look at iMX6 Sabre schematic

iMX6_SABRE_SDB_DESIGNFILES : Design files, including hardware schematics

i.MX6Q|i.MX 6Quad Processors|Quad Core|Freescale

Best regards

igor