Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. i.MX 6/7 Family DDR Stress Test  The i.MX6/7 DDR Stress Test Tool is a PC-based software to fine-tune DDR parameters and verify the DDR performance on a non-OS, single-task environment(it is a light-weight test tool to test DDR performance). It performs write leveling, DQS gating and read/write delay calibration features. The tool described on this page cover the following i.MX 6/7 series SoCs: i.MX 6DQP (Dual/Quad Plus) i.MX 6DQ (Dual/Quad) i.MX 6DL/S (Dual Lite/Solo) i.MX 6SoloX i.MX 6SL i.MX 6SLL i.MX 6UL i.MX 6ULL/ULZ i.MX 7D/S i.MX 7ULP Note that the DDR Stress test tool supports the all of the above i.MX SoCs, however, some of the supported i.MX SoCs named in the tool support multiple i.MX SoCs as follows: MX6DQ – when selected, this supports both i.MX 6DQ and i.MX 6DQP (Plus) MX6DL – when selected, this supports both i.MX 6DL and i.MX 6S (i.MX 6DLS family) MX6ULL – when selected, this supports both i.MX 6ULL and i.MX6 ULZ MX7D – when selected, this supports both i.MX 7D and i.MX 7S The purpose of the i.MX 6/7 series DDR Tools is to enable users to generate and test a custom DRAM initialization based on their device configuration (density, number of chip selects, etc.) and board layout (data bus bit swizzling, etc.). This process equips the user to then proceed with the bring-up of a boot loader and an OS. Once the OS is brought up, it is recommended to run an OS-based memory test (like Linux memtester) to further verify and test the DDR memory interface. The i.MX 6/7 series DDR Tools consist of: DDR Register Programming Aid (RPA): i.MX 6/7 Series DDR Tool Release DDR Stress test: Described below There are three options to run the DDR Stress test. Each of these options are provided in the attached zip files. The following is a high-level overview of each option along with the naming convention of the associated zip file: Option 1 GUI based: Run the GUI executable and connect your board to the host PC via USB Archive file: ddr_stress_tester_vX.xx.zip The tool will first need to run a DDR initialization script for the specified i.MX SoC (refer to Load Init Script in the GUI tool).  Example initialization scripts based on NXP's development boards can be found in this zip file under the script folder.  Note, these scripts may need to be modified for your custom board and memory.   Option 2 DDR Stress Tester: JTAG Interface A hardware debugger connected to the board via the JTAG interface is used to download an elf file into the i.MX SoC OCRAM (internal RAM) and then begin execution. Results are shown on the UART serial port (115200-8-n-1). Archive file: ddr_stress_tester_jtag_vX.xx.zip As with the GUI tool, the JTAG/debugger option will first need to run a DDR initialization script for the specified i.MX SoC. Refer to the GUI tool description above for the location of the example scripts (which are found in the ddr_stress_tester_vX.xx.zip file). Note that the scripts are available either in the RealView ICE format (.inc file) or the DS-5 DSTERAM format (.ds). For other debuggers, the user will have to modify the script's command syntax for their specific debugger. This is also true if converting from a RealView Ice (.inc) format to a DS-5 DSTREAM (.ds) format and vice versa. The DDR Stress Tester executable (starting with V2.20) has an auto UART detection feature. If a different UART port for the serial console has been chosen than used on the NXP development tool (EVK, SABRE) specific commands can be added to the DDR initialization script that allows you to configure for the specific UART and then load and run the elf executable. Refer to the FAQ section of this community post and the txt file found in the JTAG archive file for instructions.   Option 3 U-Boot: The boot loader u-boot is running and commands in u-boot are used to download the bin file into SoC OCRAM and begin execution. Results are shown on the UART serial port (115200-8-n-1) Archive file: ddr_stress_tester_uboot_vX.xx.zip When downloading the DDR Stress Tool by u-boot, please copy the ddr-test-uboot-jtag-mxxxx.bin to SD card and load it to IRAM using the 'fatload' u-boot command (see notes below when using newer versions of u-boot). For i.MX6, please load the binary to 0x00907000. For i.MX7D, please load the binary to 0x00910000.  It is imperative to first disable the I and D cache in u-boot as shown below as the DDR Stress Test re-configures and re-enables the cache and MMU page table. While this option allows the user to load and run the DDR stress test from u-boot, NXP highly recommends executing the GUI based version for system testing and debugging. The u-boot version is considered a “last resort” for systems in production which may not have USB or JTAG connectivity. The reasons behind this stance are: In the GUI version, the system starts “clean” and uninitialized, whereas u-boot initializes many SoC features outside the knowledge of the DDR stress test and may conflict with the stress test operation When running the u-boot version, the test will overwrite the contents of u-boot residing in DDR, hence the test will overwrite any data in DDR. Once the stress test is loaded and executed, u-boot itself will no longer be accessible. To return to the functionality of u-boot, a system re-boot is required. Newer versions on u-boot do not allow a direct loading of the DDR stress test code from the SD card (boot media) directly to the SoC internal OCRAM (aka IRAM). Hence, the procedure is updated to first load the DDR stress test code into DDR and then copy into OCRAM, as shown in the procedure below: u-boot> dcache off;icache off;fatload mmc 2:1 0x12000000 ddr-test-uboot-jtag-mx6dq.bin;cp.b 0x12000000 0x00907000 0x20000;go 0x00907000 As u-boot initializes many peripherals that may conflict with the operation of the DDR stress test, it is necessary to clock gate these peripherals prior to running the DDR stress test. Hence, it is highly recommended to augment the procedure above as follows: u-boot> dcache off;icache off;fatload mmc 2:1 0x12000000 ddr-test-uboot-jtag-mx6dq.bin;cp.b 0x12000000 0x00907000 0x20000; u-boot> mw 0x020c4068 0x00C0000F; u-boot> mw 0x020c406c 0x00000000; u-boot> mw 0x020c4074 0x3F300000; u-boot> mw 0x020c4078 0x0000F300; u-boot> mw 0x020c407c 0x0F000003; u-boot> mw 0x020c4080 0x000003FC; u-boot> go 0x00907000 Note, in the above procedure, it is recommended to write to each clock gate register in separate commands (refer to commands starting with “mw”). The SoC requires a finite amount of time to gate each clock hence performing this sequence with a new command line write ensures the SoC has time to gate the intended clocks.   Stress Test Revision Features Comments 3.00 Add i.MX 7ULP support in the GUI version Known issues: USB connection is unstable when under USB HUB or some PC environments 2.92 Minor correction with write leveling calibration code error check to avoid a corner case of flagging an error when none have occurred.    2.91 Resolved issue with write leveling calibration code where a race condition in the code may result in the calibration routine not being able to find any delay values.   Only applies to MX6 series SoCs that support DDR3.  2.90 Reserve write delay line register (MMDC_MPWRDLCTL) configuration as DDR script does when do write calibration. In previous releases, MMDC_MPWRDLCTL would be changed to 0x40404040 by default.      * Further details available in the release notes  _________________________________________________________________________________________________________________________________________    FAQ   Q. I see an error message that states "ERROR: DCD addr is out of valid range.", why is this and how do I resolve?   A. Sometimes, when using the register programming aid, there are registers writes that are not supported in the DCD range.  Try looking for the following items and comment them out from the DDR initialization script: wait = on setmem /16 0x020bc000 = 0x30 // disable watchdog (note the address for this may be different between i.MX6x devices)  Q. How do I select the "DDR Density" pull-down menu and what is the purpose of this?   A. The DDR Density pull-down menu gives the user the option of testing a DDR density smaller than what they actually have on their board.  The advantage of doing this is to speed up test time to allow the user to perform a "quick test" of their system.  IMPORTANT: it is imperative that the user not set this value higher than the supported density on their board, doing so will cause the stress test to fail and/or lock up. The DDR Density has a different meaning depending on the memory type being tested (DDR3 or LPDDR2): For DDR3, this is the density per CHIP SELECT.  So if your board has two chip selects, and each chip select has 512MB, you would simply select 512MB or lower.  The default setting will simply set this to the detected density per chip select. For LPDDR2, this is the density per CHANNEL.  This is only relevant for MX6 devices that support 2 channel LPDDR2 memories (MX6DQ, MX6DL).  For other MX6 devices that support only one LPDDR2 channel, then this is the total density (for the maximum setting) for that channel. Note that for LPDDR2, the number of chip selects (per channel) is irrelevant when selecting the density to test as the stress test combines both chip-selects into one combined density per channel.  For example, lets say you have a 2GB LPDDR2 device, which 2 channels and 2 chip-selects per channel.  That means you have 512MB per chip select, per channel.  Or, it also means you have 1GB per channel when combining both chip selects per channel.  In this case, you would choose (a maximum setting of) 1GB in the DDR Density drop down menu.  However, this is also the same setting as the default setting (which you are welcome to still choose 1GB to convince yourself that 1GB per channel is indeed being tested). Now let's assume you have only one channel (LPDDR2) and one chip select, with a density of 128MB; in this case, the maximum DDR Density you can select is 128MB. Let's assume you have one channel and two chip selects, each chip select is 128MB;  in this case, the maximum DDR Density you can select is 256MB (a combination of both chip selects).   Note, for the MX7D, an actual density needs to be entered. For the MX6x series, simply leaving this field as Default will cause the DDR stress test to ascertain the supported density from the DDR init script. As the MX7D DDR controller is different, this feature is not supported, hence it is required for the user to enter an actual density (for more details regarding MX7D usage of density and number of chip-selects, see the next FAQ on the DDR CS setting).   Q.  What is the purpose of the "DDR CS" pull-down option?   A.  The answer depends on which processor you are testing:   For the i.MX 6x series: This pull down menu gives you the option of testing one chip select (CS0) or ALL (both) chip selects *IF* you have a two-chip select configuration.  If you have a two-chip select configuration, then this allows you to test only one chip select for faster test time; else you can choose to test both chip selects.  Note that if you have a one-chip select configuration and you choose "ALL", the stress test will return an error.   For the iMX 7D: Because the MX7D DDR controller is different, the DDR stress test will need the user to supply the entire supported density found on their board. The chip select field should be left as is (0) as the test will naturally test one chip select to the next. For example, let’s assume you are using two chip selects, with each chip select being 512MB. In this case, you would enter 1GB for the DDR Density field ensuring that both chip selects will be tested. The user is allowed to enter a density less than the density found on their board (for quicker testing), but keeping in mind both chip selects may not be tested in this case.   Q. I run DDR calibration using the DDR Stress Test Tool to obtain the calibration results.  Are these calibration parameters are written to the uboot flash_header.S automatically or manually?   A. The calibration values obtained from the DDR Stress Test Tool will need to be manually updated in the flash_header.S file or any other DDR initialization script.   Q. When running the DDR stress test on MX7D and I try to perform calibration, I get an error stating that calibration is not supported, is this expected?   A. Yes, calibration is not supported or needed when using MX7.  The reason is, MX7 uses a different memory controller than the MX6 series.  The MX6 series memory controller has built-in support for calibration where the MX7 memory controller does not.   Q. When running the GUI version of the DDR stress test, on MX7 and I leave DDR Density as default, I get an error in the tool stating I must supply a density.  Why is this?   A. This is due to the fact that MX7 uses a different memory controller than the MX6 series.  In the MX6 series, it was possible to calculate the memory density from the memory controller register settings.  The MX7 memory controller is different and does not lend itself to easily calculate the supported density based on the register settings.  Instead, the user should verify the density on their board and selected this value in the DDR Density pull-down menu.    Q. I noticed that when I run write-leveling calibration I sometimes see a note that due to the write-leveling calibration value being greater than 1/8 clock cycle that WALAT must be set to 1.  What does this mean?   A. In the MMDC chapter of the reference manual for the specific i.MX 6 device, the need to set WALAT is described in the MDMISC register as follows: "The purpose of WALAT is to add time delay at the end of a burst write operation to ensure that the JEDEC time specification for Write Post Amble Delay (tWPST) is met (DQS strobe is held low at the end of a write burst for > 30% a clock cycle before it is released). If the value of any of the WL_DL_ABS_OFFSETn register fields are greater than ‘1F’, WALAT should be set to ‘1’ (cycle additional delay). WALAT should be further increased for any full-cycle delays added by the WL_CYC_DELn register fields." Therefore, if the write-leveling calibration routine detects any write-leveling delay value greater than 0x1F, it will note to the user that WALAT must be set and the user should update their DDR3 init script to ensure WALAT is set.  Sometimes, a user may find that the write-leveling delay value may fluctuate from one run to the next, which is quite normal.  If it is found that this delay is "borderline" meaning sometimes it is greater than 0x1F and sometimes it might be slightly less, then it is ok to go ahead and set WALAT permanently in your init script as there is no harm in doing so and will ensure you will stay within JEDEC's tWPST.   Q. I sometimes see that after running write-leveling calibration that delay values being reported back are zero'd out (0x00), and then at times I see a non-zero value being reported, why is this? A. It is quite normal to see slight variations in the delay value between write-leveling calibration runs.  The write-leveling calibration routine assumes a majority of users have designed their board such that the DDR3 memories are placed close to the i.MX 6 SoC. There’s a mechanism in NXP’s DDR Stress test write leveling calibration code that checks the returned write leveling value. If the write-leveling calibration routine detects that the returned delay value is greater than ¾ of a clock cycle, it will "zero out" the delay value. It does this because it assumes that such a large delay result is due to the fact that the DQS signal is already delayed relative to the SDCLK, and to align DQS with SDCLK requires the calibration routine to delay DQS even further to align it to the next SDCLK edge, something we ideally would like to avoid.  JEDEC specs that the DQS edge must be within 25% of a SDCLK cycle with respect to the SDCLK edge, so having DQS initially slightly delayed from SDCLK is actually ok, hence why the calibration routine “zero’s” this out when the returned value exceeds ¾ of a clock cycle.  In cases like this, the DQS edge and SDCLK edge are so close together that in some calibration runs, the DQS edge may slightly precede SDCLK (resulting in a very small write-leveling delay value) and other runs, it may be slightly delayed relative to the SDCLK (resulting in a very large write-leveling delay value that will try to align DQS to the next SDCLK edge, hence needs to be zero’d out).   Q. When using the JTAG version of the DDR stress test, how can I select a different UART port for my serial port?   A. Under the folder ddr_stress_tester_jtag_v2.52, there's a text file that describes how to add a different UART port by adding a few additional commands to your DDR init script.  The following is an outline of these commands: 1. Ungate UART module clocks (most NXP scripts ungate all of the peripheral clocks at the beginning of the script, so this part is already done) 2. Configure the IOMUX options for the pins you wish the UART to use (normally an IOMUX option for UART_TX and UART_RX, and a daisy chain option for the UART_RX input) 3. Enable the desired UART module via the register UCR1, bit UART_EN 4. Disable other UART modules (UCR1[UART_EN] = 0).  Normally disabling UART1 should be sufficient, but it doesn't hurt to disable all of the other un-used UART options for the purpose of the stress test.   Here's an example in the .ds file vernacular of a set up as follows: MX6DQ, UART4 on KEY_COL0 and KEY_ROW0 (assume clock is ungated to all peripherals): mem set 0x020E01F8 32 0x00000004   #// config_pad_mode(KEY_COL0, ALT4) mem set 0x020E01FC 32 0x00000004   #// config_pad_mode(KEY_ROW0, ALT4); mem set 0x020E0938 32 0x00000001   #// Pad KEY_ROW0 is involved in Daisy Chain. mem set 0x02020080 32 0x00000000   #//disable UART1 in UART1_UCR1 (Note, you can disable other UART modules as well) mem set 0x021F0080 32 0x00000001   #//enable UART4 in UART4_UCR1   Here's another example in the .inc file vernacular of a set up as follows: MX6SX, UART5 on SD4_DATA4 abd SD4_DATA5 (assume clock is ungated to all peripherals): setmem /32 0x020E0294 = 0x2 //IOMUXC_SW_MUX_CTL_PAD_SD4_DATA5, ALT2; UART5_TX_DATA setmem /32 0x020E0290 = 0x2 //IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4, ALT2; UART5_RX_DATA setmem /32 0x020E0850 = 0x00000000 // IOMUXC_UART5_IPP_UART_RXD_MUX_SELECT_INPUT, daisy chain for UART5_RX input to use SD4_DATA4 setmem /32 0x021F4080 = 0x00000001 // Enable UART_EN in UCR1 of UART5 // Disable UART_EN in UCR1 of UART1, UART2, UART3, and UART4 setmem /32 0x02020080 = 0x00000000 // UART1 setmem /32 0x021F0080 = 0x00000000 // UART2 setmem /32 0x021EC080 = 0x00000000 // UART3 setmem /32 0x021E8080 = 0x00000000 // UART4     Related Resources Links: iMX 8M Mini Register Programming Aid DRAM PLL setting  i.MX 8/8X Series DDR Tool Release  i.MX 8M Family DDR Tool Release 

This patch made the display no interrupt from uboot to kernel to Android. The IPU and related hardware display interface will only be initialized once in Uboot, the kernel code will skip the IPU initialization.   1. Description     1) Support HDMI, LVDS and LCD output in UBoot.     2) Support UBoot logo keep from uboot to kernel to Android.     3) For HDMI, both 720P and 1080P mode were supported.     4) For LVDS, 1024x768 and 1080P dual channel panels were supported.     5) The logo file is a 32 bpp bmp file. 2. File List -- kernel_imx\0001-Keep-uboot-logo-for-Android-boot-supports-HDMI-LCD-a.patch -- kernel_imx\0002-Bug-fix-for-uboot-logo-keep-patch.patch    Kernel patch to support the logo keep feature. -- uboot-imx\0001-Enable-uboot-logo-for-HDMI-LCD-and-LVDS.patch    Uboot patch to support the logo display. -- logo.bmp    Example 32bpp logo file. -- readme.txt    this file, please refer to it before use the patches 3. Requirement - iMX6 SabreSD board. - Android JB4.2.2_1.1.0-GA UBoot and kernel. 4. How to use -- Copy the two patch files to Android kernel_imx and uboot-imx folder and apply them.     $ cd ~/myandroid/kernel_imx/     $ git apply ./0001-Keep-uboot-logo-for-Android-boot-supports-HDMI-LCD-a.patch     $ cd ~/myandroid/bootable/bootloader/uboot-imx/     $ git apply ./0001-Enable-uboot-logo-for-HDMI-LCD-and-LVDS.patch     $ git apply ./0002-Bug-fix-for-uboot-logo-keep-patch.patch   -- Build the new uboot image:     $ cd ~/myandroid/bootable/bootloader/uboot-imx     $ export CROSS_COMPILE=~/myandroid/prebuilt/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-     $ export ARCH=arm     $ make mx6q_sabresd_android_config     $ make   -- Before build new UBoot image, the display type can be selected from file uboot-imx\include\configs\mx6q_sabresd.h // Select one of the output mode #define IPU_OUTPUT_MODE_HDMI //#define IPU_OUTPUT_MODE_LVDS //#define IPU_OUTPUT_MODE_LCD   -- Build the new kernel image:     $ cd ~/myandroid/kernel_imx     $ export CROSS_COMPILE=~/myandroid/prebuilt/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-     $ export ARCH=arm     $ make imx6_android_defconfig     $ make uImage   -- Before "make uImage", make menuconfig can be used to select the display type.                 System Type  --->                    Freescale MXC Implementations  --->                       MX6 clk setting for smooth UI transtion from bootloader to kernel  --->                           Select Display Interface                              ( )  Smooth UI transtion on LCD, IPU1, DI0                              ( )  Smooth UI transtion on LVDS, IPU1, DI1                              (X)  Smooth UI transtion on HDMI, IPU2, DI0   -- Uboot parameters for video mode    1080P HDMI:       "video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 fb0base=0x27b00000 fbmem=28M hdmi_audio_clk=148500000"      720P HDMI:       "video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 fb0base=0x27b00000 fbmem=28M hdmi_audio_clk=74250000"      1024x768 LVDS:       "video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666,bpp=32 fb0base=0x27b00000 fbmem=28M"      800x480 LCD:       "video=mxcfb0:dev=lcd,CLAA-WVGA,if=RGB565,bpp=32 fb0base=0x27b00000 fbmem=28M" -- dd the logo.bmp to SD card address 0x100000 and skip the 54 bytes bmp file header.    sudo dd if=logo.bmp of=/dev/sdc bs=1 seek=1048576 skip=54 5. Note     1) The logo.bmp file should be 32bpp or 16bpp, and it should be synced with video mode parameters "bpp=xx",          and uboot config file mx6q_sabresd.h (#define DISPLAY_BPP  xx).       2) The IPU number and DI number are hard coded in kernel file "board-mx6q_sabresd.c". static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {   .ipu_id = 1,   .disp_id = 0, }; static struct fsl_mxc_lcd_platform_data lcdif_data = {   .ipu_id = 0,   .disp_id = 0,   .default_ifmt = IPU_PIX_FMT_RGB565, }; static struct fsl_mxc_ldb_platform_data ldb_data = {   .ipu_id = 0,   .disp_id = 1,   .ext_ref = 1,   .mode = LDB_SEP1,   .sec_ipu_id = 0,   .sec_disp_id = 0, };       3) The IPU number and DI number are defined by Macro in Uboot file "include\configs\mx6q_sabresd.h" #define IPU_NUM   2  // 1 for IPU1, 2 for IPU2. #define DI_NUM   0  // 0 for DI0, 1 for DI1.       4) The display type used in uboot and kernel must be same, same type, same IPU number, same DI port and        same resolution.     [2015-06-29 Update]: JB4.2.2_1.1.0_uboot_logo_keep_patch_2015-06-29.zip Fix some LVDS issues for iMX6DL. Also given an example for LVDS0 with DI0. New Uboot patches:      0002-Updated-lvds-clock-source-to-pll2_pfd0.-Same-as-kern.patch      0003-Add-support-for-iMX6DL.patch   New kernel patches      0003-Skip-lvds-re-initialization-for-logo-keep.patch      0004-Add-examlpe-for-LVDS0-logo-keep.patch     [2015-08-07 Update]: JB4.2.2_1.1.0_uboot_logo_keep_patch_2015-08-07.zip Added the new Uboot patch 0004-Correct-the-sequence-to-set-LDB-clock.patch It can correct the LVDS clock set sequence whch is a known issue that caused no LVDS display sometimes.   [2015-09-18 Update]: JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18.zip Added the patch for Android JB4.3_GA1.1.1 release. Updated clock usecount, after blank the display, the related clock can be gated off correctly. Support LVDS clock from PLL5.   [2015-12-21 Update]: Added 3.10.53_GA1.1.0 patch: L3.10.53_GA1.1.0_uboot_logo_keep_patch_2015-12-21.zip. Verified on iMX6DL/Q SabreSD board. It supports LCD and LVDS panels, HDMI patch will be released later.   [2016-01-04 Update]: Added 3.10.53_GA1.1.0 patch: L3.10.53_GA1.1.0_uboot_logo_keep_patch_2016-01-04.zip. Added HDMI display support. Now it supports LCD, LVDS and HDMI displays. Fixed the video playback issue for boot up.   [2016-05-18 Update]: 0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch An issue was founded, when dual channel 4 lanes LVDS panel was used, in uboot there will be no LVDS TX3 signa on one LVDS port, the attach "0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch" was used to fix this issue, it is based on JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18.zip, for other BSP, please port it manually.   [2016-08-29 Update]: 0001-After-reset-IPU-in-SRC-Control-Register-wait-for-res.patch On some iMX6 chip, after reset the IPU in SRC Control Register, enable IPU at once will cause system hang up, to avoid such issue, software needs wait for IPU reset done by polling the SRC register. The attach "0001-After-reset-IPU-in-SRC-Control-Register-wait-for-res.patch" was used to fix this issue, it is based on JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18.zip + "0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch", for other BSP, please port it manually.   [2017-01-06 Update] Added patch for L4.1.15_GA1.2.0 BSP and Android M6.0.1_GA2.1.0 BSP. Files: L4.1.15_GA1.2.0_uboot_logo_keep_patch_2017-01-06.zip; M6.0.1_2.1.0_uboot_logo_keep_patch_2017-01-06.zip

Here are two patches to support BT656 and BT1120 output for i.MX6 ipuv3. With this patch, the i.MX6 can support the CVBS output on TV encoder. It is useful for a TV box. "L3.0.35_1.1.0_GA_bt656_output_patch.zip" is the patch for Freescale L3.0.35_1.1.0_GA_iMX6DQ BSP. "r13.4.1_bt656_output_patch.zip" is the patch for Freescale Android R13.4.1 BSP. 1. Features supported:     1) Support BT656(8 bits) and BT1120 (16 bits)interlaced output on display port.     2) Support both RGB and YUV frame buffer for BT656/BT1120 output.     3) Support PAL and NTSC mode.     4) Support on the fly switch between PAL and NTSC mode.     5) Support CVBS output based on adv7391 TV encoder. 2. Hardware link between iMX6 and adv7391 TV encoder chip.     IPU1_DI0_DISP_CLK connected to adv7391 CLKIN pin.     IPU1_DISP0_DAT_23~DISP0_DAT_16 connected to adv7391 P7~P0 pins.     IPU1_DI0_PIN2 connected to adv7391 HSYNC pin. (option)     IPU1_DI0_PIN4 connected to adv7391 VSYNC pin. (option)   - Android R13.4.1 kernel. 3. How to use -- Copy the two patch files to kernel folder.     $ git apply ./0001-Support-BT656-and-BT1120-output-for-iMX6-ipuv3.patch     $ git apply ./0002-Support-adv739x-TV-encoder-for-BT656-output.patch -- Select them in kernel config and build the new kernel image:                     Device Drivers  --->                       Graphics support  --->                           [*]   MXC BT656 and BT1120 output                           [*]   ADV7390/7391 TV Output Encoder -- Uboot parameters for video mode    Output BT656 NTSC data to display port with UVYV frame buffer mode:       "video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16"    Output BT656 NTSC data to display port with RGB565 frame buffer mode:       "video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=RGB565"    Output BT656 PAL data to display port with RGB24 frame buffer mode:       "video=mxcfb0:dev=bt656,BT656-PAL,if=BT656,fbpix=RGB24"    Output CVBS NTSC signal on adv7391 with UYVY frame buffer mode:       "video=mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=UYVY16"    Output CVBS PAL signal on adv7391 with RGB565 frame buffer mode:       "video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565" -- Switch between PAL and NTSC    $ echo D:720x480i-60 > /sys/class/graphics/fb0/mode    $ echo D:720x576i-50 > /sys/class/graphics/fb0/mode 4. Note     1) For 8 bits BT656 interface, the default data pins are "DISP0_DAT_23~DISP0_DAT_16", it can also        be any other continued display data pins, for example if "DISP0_DAT_7~DISP0_DAT_0" are used, the        macro "BT656_IF_DI_MSB" in "kernel_imx/drivers/mxc/ipu3/ipu_disp.c" should be changed from "23"        to "7".     2) For 16 bits BT1120 interface, the default data pins are "DISP0_DAT_23~DISP0_DAT_8", it can also        be any other continued display data pins, the macro "BT656_IF_DI_MSB" should be modified if the        hardware pins are changed.     3) When bt656 interface is the second display for each IPU,1-layer-fb (it can be checked with command        "$ cat /sys/class/graphics/fbx/fsl_disp_propperty"), the frame buffer can only be YUV format. In this        case, the IPU DC channel was used for BT656 display, it has no CSC function, so RGB frame buffer was        not supported. 2013-08-09 updated: The new release package "L3.0.35_1.1.0_GA_bt656_output_patch_2013-08-09.zip" had fixed the BT656 dual display issue on iMX6S/DL. Removed the old release package. 2013-09-04 updated: The new release package "r13.4.1_bt656_output_patch_2013-09-04.zip" had fixed the BT656 dual display issue on iMX6S/DL. For default, the dual display was tested with HDMI + CVBS, HDMI is the main display and adv739x CVBS output is the second display. For iMX6DQ which has two IPUs, please assign dual display to two IPUs, for example adv739x is on IPU1 DI0, it is fixed, because hardware pins used for it is fixed. Then we can assign HDMI or LVDS to another IPU (IPU2). For iMX6S/DL which has only one IPU, since adv739x had used IPU1 DI0, another display should be IPU1 DI1. 2013-09-30 updated: Added patch for L3.0.35_4.1.0_GA BSP, the file is "L3.0.35_4.1.0_GA_bt656_output_patch_2013-09-30.zip". 2014-07-21 updated: Added patch for L3.10.17_1.0.0_GA BSP, the file is "L3.10.17_1.0.0_GA_bt656_output_patch_2014-07-21.zip". 2015-01-26 updated: Updated the IPU microcode for 1080i50 and 1080i60 BT1120 output, the parameters "N" for command BMA is a 8 bits parameters, so its max value is 255, but for 1080i50 and 1080i60 output, it needs more blank data in each line, the "N" will be bigger than 255, the updated IPU microcode can fix this limitation. The updated file is "IPU_Microcode_Update_for_BT1120_1080i_20150126.zip". You can update the macro "DC_MCODE_BT656_xxx"  and function _ipu_dc_setup_bt656_interlaced() to the old patch if you used BT1120 mode to support 1080i display. The verified 1080i display mode is: {    /* 1080I60 Interlaced output */   "BT1120-1080I60", 30, 1920, 1080, 13468,   20, 3,   20, 2,   280, 1,   FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,   FB_VMODE_INTERLACED,   FB_MODE_IS_DETAILED,}, {   /* 1080I50 Interlaced output */   "BT1120-1080I50", 25, 1920, 1080, 13468,   20, 3,   20, 2,   720, 1,   FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,   FB_VMODE_INTERLACED,   FB_MODE_IS_DETAILED,}, 2016-01-28 updated: Updated IPU microcode to align with BT656.4 specification for NTSC output. For other BSP version with NTSC format support, please reference to ipu_disp_update.c for the final microcode. File "L3.0.35_4.1.0_GA_bt656_output_patch_20160128.zip"., Details, please reference to the readme.txt file in the package. 2016-06-24 update: Added BT656 and BT1120 progressive mode support. File "L3.0.35_4.1.0_GA_bt656_output_patch_20160624.zip". Details, please reference to the readme.txt file in the package. The patch for 3.14.52 GA1.1.0 BSP will be released in next week. 2016-06-27 update: Add BT656 and BT1120 display patch for 3.14.52 BSP. File "L3.14.52_1.1.0_GA_bt656_output_patch_2016-06-27.zip", details, please reference to the readme.txt in the package. 2017-03-10 update: Fixed a hard coding DC macro issue for progressive mode. Added patch "0008-Fixed-a-hard-coding-DC-macro-issue-for-progressive-m.patch" in L3.0.35_4.1.0_GA_bt656_output_patch_2017-03-10.zip. The code in patch "L3.14.52_1.1.0_GA_bt656_output_patch_2016-06-27" is correct.

                                                                                         Watch the Freescale i.MX team boot up Android 5.0 Lollipop in i.mx6 application processors—在线播放—优酷网，视频高清在线观看 The Freescale i.MX Android team has booted up Android 5.0 Lollipop in the SABRE platform for i.mx6 series. Google pushed all of the latest source for its Android release to AOSP on Nov. 5, and the Freescale Android Team started their work. With the previous 6 days to boot Android Lollipop up, the Freescale i.MX Android team enabled the basic features like connectivity, audio/video playback, sensors, inputs and display on day 7! You can see the some changes in the demo video at the beginning of the post. The Freescale i.MX Android team has closely followed almost every version of Android since it is released by AOSP and has good experience on it. Below are some snapshots and pictures for the Android Lollipop.

Here is a quick summary at booting Linux on the i.MX 6 sabre sd platform. This assumes you already have u-boot working on your platform as described here. This implies you already have a "working" Linux development environment with some ARM cross-compilers at hand (e.g. Debian + Emdebian). Get Linux sources We will use git to fetch Linux sources:   $ git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git This should create a linux directory with all the latest sources (after a while). Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l 'v*', and git checkout <the-desired-tag>. Compile Assuming your cross compiler is called e.g. arm-linux-gnueabihf-gcc, you can compile by doing:   $ cd linux   $ export ARCH=arm   $ export CROSS_COMPILE=arm-linux-gnueabihf-   $ make imx_v6_v7_defconfig   $ make You then need to supply a LOADADDR (as joowonkim pointed out); do:   $ make uImage LOADADDR=0x10008000 This should create a number of files, including arch/arm/boot/uImage and arch/arm/boot/dts/imx6q-sabresd.dtb. Put on SD We need a proper FAT partition on the SD card, from which u-boot will be able to load the kernel and dtb. Also, we need to make sure we leave some space for u-boot starting from offset 1024B. Here is an example SD card layout:   +-----+------+--------+-----+----------------   | MBR |  ... | u-boot | ... | FAT partition ...   +-----+------+--------+-----+----------------   0     512    1024           1M (offsets in bytes) Here is an example SD card layout, as displayed by fdisk:   Device    Boot      Start         End      Blocks   Id  System   /dev/sdc1            2048     8054783     4026368    c  W95 FAT32 (LBA) (units: 512B sectors) You can format the FAT partition, mount, copy and unmount with:   $ mkfs.vfat /dev/<your-sd-card-first-partition>   $ mount /dev/<your-sd-card-first-partition> /mnt   $ cp arch/arm/boot/uImage arch/arm/boot/dts/imx6q-sabresd.dtb /mnt/   $ umount /mnt Your SD card first partition is typically something in /dev/sd<X>1 or /dev/mmcblk<X>p1. Note that you need write permissions on the SD card for the command to succeed, so you might need to su - as root, or use sudo, or do a chmod a+w as root on the SD card device node to grant permissions to users. Also, be sure to have u-boot on the SD card as explained in this post. Boot! That's it; u-boot already knows how to deal with your kernel by default so you are good to go. Insert the SD card into the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. You should see u-boot messages:   U-Boot 2013.07-rc1-00014-g74771f4 (Jun 21 2013 - 16:27:39) u-boot should load the uImage and dtb from SD card and boot the kernel:   (...)   reading uImage   4215344 bytes read in 449 ms (9 MiB/s)   Booting from mmc ...   reading imx6q-sabresd.dtb   22818 bytes read in 22 ms (1012.7 KiB/s)   ## Booting kernel from Legacy Image at 12000000 ...      Image Name:   Linux-3.10.0-rc6      Image Type:   ARM Linux Kernel Image (uncompressed)      Data Size:    4215280 Bytes = 4 MiB      Load Address: 10008000      Entry Point:  10008000      Verifying Checksum ... OK   ## Flattened Device Tree blob at 11000000      Booting using the fdt blob at 0x11000000      Loading Kernel Image ... OK   OK      Using Device Tree in place at 11000000, end 11008921   Starting kernel ... The kernel should boot:   Booting Linux on physical CPU 0x0   Linux version 3.10.0-rc6 (vstehle@debian) (gcc version 4.7.2 (Debian 4.7.2-5) ) #1 SMP Fri Jun 21 18:09:26 CEST 2013 By default, the kernel will try to mount a root filesystem from the SD card second partition, as can be read in the default kernel command line:   (...)   Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk1p2 rootwait rw ...but we did not prepare a root filesystem partition, so after a number of boot messages the kernel will wait indefinitely:   (...)   mmc1: new SDHC card at address b368   (...)    mmcblk0: p1   (...)   Waiting for root device /dev/mmcblk1p2... We will see in another post how to prepare this root filesystem on the second SD card partition. Enjoy! See also... If you plan to compile Linux often, you might want to use a C compiler cache; see this post. Once you have Linux booting on your platform the next step is to give it a root filesystem. See this post for a Debian root filesystem, this post for a minimal busybox filesystem and this post for generating a root filesystem with buildroot.

This is a HW design checklist for customer's reference. Please read and fill it in carefully before requesting a schematic review. Rev3.1 @2016.10.19 -- 1. Add i.MX6DQP related contents.

Here is a quick summary at building a bootloader, a kernel and a root filesystem for the i.MX 6 sabre sd platform, using buildroot. This assumes you have a "working" Linux development environment at hand (e.g. Debian). Buildroot is a fine build system, which makes deploying Linux on embedded platforms really easy. It is comparable to Yocto in spirit, but much simpler. Thanks to my colleague gillestalis, buildroot now has builtin support for the i.MX6 sabre sd platform. Get buildroot sources We will use git to fetch buildroot sources: $ git clone git://git.busybox.net/buildroot This should create a buildroot directory with all the latest sources (after a while). Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l '201*', and git checkout <the-desired-tag>. Compile The beauty of buildroot is that it will take care of everything for you, including preparing a cross compiler. You can download and build everything by doing: $ cd buildroot $ make freescale_imx6sabresd_defconfig $ make This should download and build everything, so it will take a while. buildroot detects the number of CPUs you have in your machine and builds with parallel jobs automatically; no need to specify any -j argument to make here. All build results fall under the output/images folder: output/images/ +- rootfs.ext2 +- rootfs.tar +- u-boot.bin `- uImage Format the SD card As for Debian, we need to format the SD card with two partitions; one small FAT partition to contain the Linux kernel, and one large ext4 partition, which will contain the root filesystem with the buildroot generated userspace. Also, we need to make sure we leave some space for u-boot starting from offset 1024B. Here is an example SD card layout: +-----+------+--------+-----+---------------+----------------- | MBR |  ... | u-boot | ... | FAT partition | Linux partition ... +-----+------+--------+-----+---------------+----------------- 0     512    1024           1M              ~257M (offsets in bytes) Here is an example SD card layout, as displayed by fdisk: Device    Boot      Start         End      Blocks   Id  System /dev/sdc1            2048      526335      262144    c  W95 FAT32 (LBA) /dev/sdc2          526336     8054783     3764224   83  Linux (units: 512B sectors) You can format the FAT boot partition with: # mkfs.vfat /dev/<your-sd-card-first-partition> Your SD card first partition is typically something in /dev/sd<X>1 or/dev/mmcblk<X>p1. You can format the Linux partition with: # mkfs.ext4 /dev/<your-sd-card-second-partition> Your SD card second partition is typically something in /dev/sd<X>2 or/dev/mmcblk<X>p2. Put on SD As explained here, u-boot should reside at offset 1024B of your SD card. Also, as buildroot generates an u-boot.bin (and not an u-boot.imx) we should skip its first KB, too. In summary, to put u-boot on your SD, do:   # dd if=output/images/u-boot.bin of=/dev/<your-sd-card> bs=1k seek=1 skip=1   # sync Your SD card device is typically something in /dev/sd<X> or /dev/mmcblk<X>. Note that you need write permissions on the SD card for the command to succeed, so you might need to su - as root, or use sudo, or do a chmod a+w as root on the SD card device node to grant permissions to users. Similarly to what this post describes, you can copy the kernel to the FAT boot partition with: # mount /dev/<your-sd-card-second-partition> /mnt # cp output/images/uImage /mnt/ # umount /mnt Your SD card first partition is typically something in /dev/sd<X>1 or/dev/mmcblk<X>p1. And not unlike what is done in this post, You can install your generated root filesystem to the Linux partition with: # mount /dev/<your-sd-card-second-partition> /mnt # tar -C /mnt -xvf output/images/rootfs.tar # umount /mnt Your SD card second partition is typically something in /dev/sd<X>2 or/dev/mmcblk<X>p2. Boot! Your SD card is ready for booting. Insert it in the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. Like with Debian, u-boot default settings will not allow it to boot from the SD card, so we need to interrupt it by pressing enter at u-boot prompt for the first boot and setup u-boot environment to fix this: MX6Q SABRESD U-Boot > setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk1p2 rootwait' MX6Q SABRESD U-Boot > setenv bootcmd_mmc 'run bootargs_base bootargs_mmc; mmc dev 2; fatload mmc 2:1 ${loadaddr} ${kernel}; bootm' MX6Q SABRESD U-Boot > setenv bootcmd 'run bootcmd_mmc' MX6Q SABRESD U-Boot > saveenv Saving Environment to MMC... Writing to MMC(2)... done As this is saved in the SD card it need only to be done once at first boot. You can reboot your board or type boot; your buildroot system should boot to a prompt: (...) Welcome to Buildroot buildroot login: From there you may login as root. Enjoy! Tweak buildroot uses Linux kernel kconfig to handle its configuration. So, as for the Linux kernel, changes to the configuration can be done with e.g.: $ make menuconfig Most of the options can be tuned from there, including (most importantly) which packages get installed into the generated root filesystem. This is configuration section 'Filesystem images'. Further details are documented in buildroot manual. Tips ccache is natively supported by buildroot and can be easily enabled with configuration option BR2_CCACHE. If you only use the generated rootfs.tar as described in this post and do not care about the rootfs.ext2, you might as well save a few seconds of build by disabling its generation. This is done with configuration option BR2_TARGET_ROOTFS_EXT2. It is recommended to install an ssh server inside the target for further development. This is conveniently done with configuration option BR2_PACKAGE_OPENSSH. See also... Other root filesystems may make more sense for you; see this post for a Debian root filesystem, and this post for a minimal busybox filesystem. Freescale Yocto Project main page

Design Check Lists: HW Design Checking List for i.MX6DQSDL HW Design Checking List for i.Mx53 Hardware Design Checklist for i.MX28 HW_Design_Checking_List_for_i.MX6SoloX i.MX6UL Hardware design checklist   DDR Design Tool: I.MX53 DDR3 Script Aid imx53 DDR stress tester V0.042 i.Mx6DQSDL DDR3 Script Aid MX6DQP DDR3 Script Aid i.Mx6DQSDL LPDDR2 Script Aid i.Mx6SL LPDDR2 Script Aid i.MX6SX DDR3 Script Aid I.MX6UL DDR3 Script Aid i.MX6UL_LPDDR2_Script_Aid i.MX6ULL_DDR3_Script_Aid  i.MX6ULL_LPDDR2_Script_Aid  MX6SLL_LPDDR2_Script_Aid  MX6SLL_LPDDR3_Script_Aid  i.MX6 DDR Stress Test Tool V1.0.3 i.MX6/7 DDR Stress Test Tool V3.00 i.MX8MSCALE DDR Tool Release  i.MX8M DDR3L register programming aid  i.MX 8/8X Family DDR Tools Release   Application Notes: MX_Design_Validation_Guide I.MX6 series USB Certification Guides

Here we show how to bootstrap the Debian Linux distribution from a PC to the i.MX6 sabre sd platform. While bootstrapping Debian on any architecture "natively" is pretty straightforward, "cross-bootstrapping" requires some techniques that we will explain. This document assumes you are able to boot a Linux kernel on your platform already. See this post for details on how to do it. Also, this document assumes you are using a Debian PC for preparing your SD card. You will require the following packages to be installed: binfmt-support qemu-user-static debootstrap Note: all the commands found in the following steps need to be run as root. Formatting the SD card We need to format the SD card with two partitions; one small FAT partition to contain the Linux kernel and its dtb, and one large ext4 partition, which will contain the root filesystem with the Debian userspace. Also, we need to make sure we leave some space for u-boot starting from offset 1024B. Here is an example SD card layout:   +-----+------+--------+-----+---------------+-----------------   | MBR |  ... | u-boot | ... | FAT partition | Linux partition ...   +-----+------+--------+-----+---------------+-----------------   0     512    1024           1M              ~257M (offsets in bytes) Here is an example SD card layout, as displayed by fdisk:   Device    Boot      Start         End      Blocks   Id  System   /dev/sdc1            2048      526335      262144    c  W95 FAT32 (LBA)   /dev/sdc2          526336     8054783     3764224   83  Linux (units: 512B sectors) You can format and mount the Linux partition with:   # mkfs.ext4 /dev/<your-sd-card-second-partition>   # mount /dev/<your-sd-card-second-partition> /mnt Your SD card second partition is typically something in /dev/sd<X>2 or /dev/mmcblk<X>p2. Do not forget to install u-boot and a Linux kernel as explained in those posts. Bootstrapping Debian First stage The first stage of Debian bootstrapping is done with:   # debootstrap --foreign --arch=armhf testing /mnt This will retrieve the base Debian packages from the internet, and perform a first stage of installation:   I: Retrieving Release   I: Retrieving Release.gpg   I: Checking Release signature   I: Valid Release signature (key id A1BD8E9D78F7FE5C3E65D8AF8B48AD6246925553)   I: Validating Packages   I: Resolving dependencies of required packages...   I: Resolving dependencies of base packages...   I: Found additional required dependencies: insserv libbz2-1.0 libcap2 libdb5.1 libsemanage-common libsemanage1 libslang2 libustr-1.0-1   I: Found additional base dependencies: libee0 libept1.4.12 libestr0 libgcrypt11 libgnutls-openssl27 libgnutls26 libgpg-error0 libidn11 libjson-c2 liblognorm0 libmnl0 libnetfilter-acct1 libnfnetlink0 libp11-kit0 libsqlite3-0 libtasn1-3 libxapian22   I: Checking component main on http://ftp.us.debian.org/debian...   (...)   I: Extracting util-linux...   I: Extracting liblzma5...   I: Extracting zlib1g... At this point, the necessary tools for second stage of installation are under /mnt/debootstrap/. Second stage The second stage needs to run natively; on an arm platform, that is. But we can use the combination of two techniques to perform this stage on the PC anyway:   # cp /usr/bin/qemu-arm-static /mnt/usr/bin/   # chroot /mnt /debootstrap/debootstrap --second-stage Those commands copy an arm emulator on the target filesystem, and use the chroot command to execute the second stage of the installation into the SD card, on the PC, with transparent emulation:   I: Installing core packages...   I: Unpacking required packages...   I: Unpacking libacl1:armhf...   I: Unpacking libattr1:armhf...   I: Unpacking base-files...   (...)   I: Configuring tasksel...   I: Configuring tasksel-data...   I: Configuring libc-bin...   I: Base system installed successfully. You can now remove /mnt/usr/bin/qemu-arm-static, or keep it for later, subsequent chroot under emulation. Finetuning the root filesystem For development it is handy to remove the root password on the target by removing the '*' from /mnt/etc/shadow on the SD card:   root::15880:0:99999:7::: Also, we can add the following line in /mnt/etc/inittab to obtain a login prompt on the UART:   T0:23:respawn:/sbin/getty -L ttymxc0 115200 vt100 You can now unmount the filesystem with:   # umount /mnt Boot! Your SD card is ready for booting. Insert it in the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. At the time of writing u-boot tells the kernel to boot from the wrong partition by default, so we need to interrupt by pressing enter at u-boot prompt for the first boot and setup u-boot environment to fix this:   U-Boot > setenv mmcroot /dev/mmcblk0p2 rootwait rw   U-Boot > saveenv   Saving Environment to MMC...   Writing to MMC(1)... done As this is saved in the SD card it need only to be done once at first boot. You can reboot your board or type boot; your Debian system should boot to a prompt:   (...)   [ ok ] Starting periodic command scheduler: cron.   [ ok ] Running local boot scripts (/etc/rc.local).   Debian GNU/Linux jessie/sid debian ttymxc0   debian login: From there you may login as root. It is recommended to setup the network connection and install an ssh server inside the target for further development. Enjoy! See also... With the amounts of memory we have today in the systems, it is even possible to boot Debian in a ramdisk. See this post about busybox for the ramdisk generation. Another way of generating a root filesystem is by building it with buildroot. See and this post for details.

Hi All, The new i.MX 6 Q/D/DL/S/SL L3.0.35_4.1.0 GA release is now available on the http://www.freescale.com/site. ·         Files available                                   # Name Description 1 L3.0.35_4.1.0_LINUX_DOCS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Linux BSP   Documentation. Includes Release Notes, Reference Manual, User guide. API   Documentation 2 L3.0.35_4.1.0_LINUX_MMDOCS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux Multimedia Codecs Documentation.   Includes CODECs Release Notes and User's Guide 3 L3.0.35_4.1.0_SOURCE_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite Linux BSP   Source Code Files 4 L3.0.35_4.1.0_MM_CODECS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux Multimedia Codecs Sources 5 L3.0.35_4.1.0_AACP_CODECS i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux AAC Plus Codec 6 L3.0.35_4.1.0_DEMO_IMAGE_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux Binary Demo Files 7 L3.0.35_4.1.0_UBUNTU_RFS_BSP i.MX   6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo and i.MX 6Sololite  Linux File System for the Ubuntu Images 8 i.MX_6D/Q_Vivante_VDK_146_Tools Set   of applications for the Linux L3.0.35_4.1.0 BSP, designed to be used by   graphics application developers to rapidly develop and port graphics   applications. Includes applications, GPU Driver with vprofiler enabled and   documentation. 9 IMX_6DL_6S_MFG_TOOL Tool   and documentation for downloading OS images to the i.MX 6DualLite and i.MX   6Solo. 10 IMX_6DQ_MFG_TOOL Tool   and documentation for downloading OS images to the i.MX 6Quad and i.MX 6Dual. 11 IMX_6SL_MFG_TOOL Tool   and documentation for downloading OS images to the i.MX 6Sololite. ·         Target HW boards o   i.MX 6Quad SABRE-SDP o   i.MX 6Quad SABRE-SDB o   i.MX 6Quad SABRE-AI o   i.MX 6DualLite SABRE-SDP o   i.MX 6DualLite SABRE-AI o   i.MX 6SL EVK ·         New features o   BSP New Features on i.MX 6D/Q, i.MX 6DL/S and MX 6SL: §  HDCP §  CEC §  GPU4.6.9p12 §  Audio playback IRAM/SDMA §  V4L capture resize on MX6SL §  MX6DQ disable the double line fill feature of PL310 ·         Known issues o   For known issues and limitations please consult the release notes.

1.  Software change for Certification Test Compared to standard Linux/Android release, you may need to do below software changes to implement the certification tests, it is applicable from imx_3.10.31_1.1.0 Linux BSP GA release, for the release before that, user may need to apply the related patches before doing below things, and some examples may be different for former releases, the user needs to change accordingly. See the detailed information in this document “How to do USB Compliance Test for 3.10.y kernel”. And there is also a link describes the patch for USB Certification Test: Patch to make i.MX6DQ USB to support test modes for certification test 2. I.MX6 series USB Certification Guide http://cache.freescale.com/files/microcontrollers/doc/user_guide/IMXUSBCGUG.pdf Include the descriptions of all the Certification Test requirements, equipment, procedures for I.MX6 series. For example, Host/Device High Speed Eye Diagram Test(眼图测试).   3. Description of USBCertification related Registers AN4589 Configuring USB on i.MX 6 Series Processors http://cache.freescale.com/files/32bit/doc/app_note/AN4589.pdf   4. I.MX6Q/I.MX6DL/I.MX6SL/ I.MX6SX Certification Reports, see attachments   5. Checklist and TPL, see attachments. Original Attachment has been moved to: I.MX6SX-Checklist-and-TPL.zip

Hi All, The new Android JB4.2.2_1.0.0-GA release is now available on www.freescale.com ·         Files available Name Description IMX6_JB422_100_ANDROID_DOCS i.MX 6Quad, i.MX 6Dual, and   i.MX 6DualLite Android jb4.2.2_1.0.0 BSP Documentation. Includes Release   Notes, User's Guide, QSG and FAQ Sheet. IMX6_JB422_100_ANDROID_SOURCE i.MX 6Quad, i.MX 6Dual, and   i.MX 6DualLite Android jb4.2.2_1.0.0 BSP, Documentation and Source Code for   BSP and Codecs. IMX6_JB422_100_ANDROID_DEMO i.MX 6Quad, i.MX 6Dual, and   i.MX 6DualLite Android jb4.2.2_1.0.0 BSP Binary Demo Files ·         Target HW boards o   i.MX6DL  SABRE SD board o   i.MX6Q  SABRE SD board o   i.MX6DQ SABRE AI board o   i.MX6DL SABRE AI board ·         Release Description i.MX Android jb4.2.2_1.0.0-ga is GA release for Android 4.2.2 Jelly Bean(JB) on i.MX6Q SABRE SD, i.MX6DL SABRE SD and i.MX6Q/DL SABRE AI platform with key features integrated. i.MX Android jb4.2.2_1.0.0-ga release includes all necessary codes, documents and tools to assist users in building and running Android 4.2.2 on i.MX6Q and i.MX6DL hardware board from the scratch. The prebuilt images are also included for a quick trial on Freescale i.MX6Q, i.MX6DL SABRE SD and i.MX6Q/DL SABRE AI boards. Most of deliveries in this release are provided in source code with the exception of some proprietary modules/libraries from third parties. ·         Features Feature i.MX6Q   SABRE SD i.MX6DL   SABRE SD i.MX6   SABRE AI Comments Linux 3.0.35  kernel Y Y Y Based on Linux BSP   L3.0.35_4.0.0 GA release Google JellyBean   4.2.2 release Y Y Y Based on   android-4.2.2_r1 release Bootup with Android Y Y Y Boot source eMMC& External SD eMMC& External SD SD&Nand Default Nand chip   been support is Micron MT29F8G08ABABAWP Splash Screen for   LVDS Y Y N UI (input) Multi-touch on LVDS   panel Multi-touch on LVDS panel Multi-touch on LVDS   panel UI (display) LVDS panel, HDMI   display LVDS panel, HDMI   display LVDS panel, HDMI   display UI (dual display,   LVDS+HDMI, UI mirror displayed on second device) Y Y Y UI (brightness   control) Y Y Y UI (LiveWallpaper) Y Y Y Storage - External   Media Y Y Y SD, External SD and   UDisk Storage - MTP   (Media Transfer Protocol) Y Y Y Connectivity -   Ethernet Y Y Y Connectivity - BT     Y Y     N Hardware: ·           Atheros AR3001 ·           Atheros AR3002 Profiles: ·           A2DP ·           HID ·           OPP ·           PBAP Connectivity - WiFi Y Y     Y Hardware: ·           Atheros AR6103 SDIO card Features: ·           AP mode ·           Wake on Wireless Connectivity -   3G Y Y   N Hardware: ·           HUAWEI EM770W modem ·           Infinion Amazon 1 modem ·           ZTE FM210 modem Connectivity -   GPS Y Y N Connectivity - USB Tethering Y Y Y Support WIFI and   Ethernet as upstream Internet - SIP   voice call N N N Internet - VPN Y Y Y Power - Battery   status report Y Y N/A Known limitations   about the accuracy in some use cases Power - CPU Freq Y Y Y Power - Bus Freq Y Y Y Media - Music Play Y Y Y Media - Sound Record Y Y Y Media - Video Play Y Y Y Media - Camera Y Y N Media - TVIN N/A N/A Y PAL/NTSC Media - Dual Camera Y Y Y Hardware for SABRE SD: ·           Front Camera: OV5642 CSI camera ·           Rear Camera: OV5640 MIPI camera Hardware   for SABRE AI: ·           Front Camera: UVC camera ·           Rear Camera: TV IN Media - Camcorder Y Y N Media - USB Camera Y Y Y Logitech: ·           C250 ·           E3500 Media - USB Micro Y Y Y Media - Movie   Studio Y Y Y Media - HDMI audio output Y Y Y Graphic - HW 3D   acceleration Y Y Y OpenGLES 1.1/2.0   via GC2000 or GC800 3D core Graphic - HW   accelerated UI surface composition Y Y Y Misc - ADB over USB Y Y Y Misc - Fastboot   utility Y Y Y Misc - SW update   and factory reset Y Y Y Sensor - Magmatic Y Y N Sensor -   Accelerometer Y Y N Sensor - Light Y Y N NTFS-3G File System Y Y Y For external   Storage NAND N N Y Tested NAND chip: - Micro 29F8G08ABABA ·         Change List The below section lists the big changes in JellyBean which need the user’s attention when comparing to Freescale ICS version: o   Default Android multiple display implementation in JellyBean o   Display resolution change in Setting is not been supported o   New camera hal implementation based on JellyBean libcamera2 o   Add NTFS file system support for external storage ·         Known issues For known issues and limitations please consult the release notes

This is the prototype demo to enable surround view demo on SabreSD.   The attached Files are HW&SW guides and demo video. Updating Notes: Add miniPCIE Surround View_Rev A design file (include schematic and layout) as attachement. Add Gerber file   i.MX6Q Surround view patch https://community.freescale.com/docs/DOC-95143 Original Attachment has been moved to: Gerber-file.zip Original Attachment has been moved to: miniPCIe-Surround-View_Rev-A.zip

BlueZ5 provides support for the core Bluetooth layers and protocols. It is flexible, efficient and uses a modular implementation. BlueZ5 has implemented the Bluetooth low level host stack for Bluetooth core specification 4.0 and 3.0+HS which includes GAP, L2CAP, RFCOMM, and SDP. Besides the host stack, BlueZ5 has also supported the following profiles itself or via a third party software. Profiles provided by BlueZ: A2DP 1.3 AVRCP 1.5 DI 1.3 HDP 1.0 HID 1.0 PAN 1.0 SPP 1.1 GATT (LE) profiles: PXP 1.0 HTP 1.0 HoG 1.0 TIP 1.0 CSCP 1.0 OBEX based profiles (by obexd): FTP 1.1 OPP 1.1 PBAP 1.1 MAP 1.0 Provided by the oFono project: HFP 1.6 (AG & HF)Supported Profiles BlueZ5 has been supported in the latest Freescale Linux BSP release, so it would be pretty easy to generate the binaries for Bluetooth core stack and its profiles. In order to support A2DP sink on a SabreSD board, the following software should be downloaded and installed onto the target rootfs too. sbc decoder version 1.3 (http://www.kernel.org/pub/linux/bluetooth/sbc-1.3.tar.gz) PulseAudio 5.0 (http://www.freedesktop.org/software/pulseaudio/releases/pulseaudio-5.0.tar.xz) PulseAudio package has some dependencies with bluetooth and sbc packages, and pulseaudio will detect if the two packages have been built and then decide which pulse plugin modules to be generated. So the building order will be 1) bluez5_utils or bluez_utils   2) sbc   3) pulseaudio. After compile and install the above software onto the target rootfs, you should be able to see the following executable under the directory /usr/bin From BlueZ5: bluetoothctl, hciconfig, hciattach (Needed by operating a UART bluetooth module) From PulseAudio: pulseaudio, pactl, paplay If the building dependency has been setup correctly, the following pulse plugin modules should be located under the directory /usr/lib/pulse-5.0/modules module-bluetooth-discover.so      module-bluetooth-policy.so        module-bluez5-device.so   module-bluez5-discover.so Edit the file /etc/dbus-1/system.d/pulseaudio-system.conf, and add the following lines in red: <policy user="pulse">     <allow own="org.pulseaudio.Server"/>    <allow send_destination="org.bluez"/>     <allow send_interface="org.freedesktop.DBus.ObjectManager"/> </policy> Edit the file /etc/dbus-1/system.d/bluetooth.conf, and add the following lines: <policy user="pulse">      <allow send_destination="org.bluez"/>      <allow send_interface="org.freedesktop.DBus.ObjectManager"/> </policy> Adding the following settings at the bottom of the pulseaudio system configuration file which locates in /etc/pulse/system.pa ### Automatically load driver modules for Bluetooth hardware .ifexists module-bluetooth-policy.so load-module module-bluetooth-policy .endif .ifexists module-bluetooth-discover.so load-module module-bluetooth-discover .endif load-module module-switch-on-connect load-module module-alsa-sink device_id=0 tsched=true tsched_buffer_size=1048576 tsched_buffer_watermark=262144 On the system that can automatically detect the alsa cards, the above line #13 should be removed.  Also make sure "auth-anonymous=1" is added to the following line, which can resolve the issue: "Denied access to client with invalid authorization data". load-module module-native-protocol-unix auth-anonymous=1 Selecting a audio re-sampling algorithm and configuring the audio output by adding the following settings to the file daemon.conf locating in /etc/pulse resample-method = trivial enable-remixing = no enable-lfe-remixing = no default-sample-format = s16le default-sample-rate = 48000 alternate-sample-rate = 24000 default-sample-channels = 2 Pulseaudio can be started as a daemon or as a system-wide instance. To run PulseAudio in system-wide mode, the program will automatically drop privileges from "root" and change to the "pulse" user and group. In this case, before launching the program, the "pulse" user and group needs to be created on the target system.  In the example below, "/var/run/pulse" is the home directory for "pulse" user. adduser -h /var/run/pulse pulse addgroup pulse-access adduser pulse pulse-access Because PulseAudio needs to access the sound devices, add the user "pulse" to the "audio" group too. adduser pulse audio Starting bluetoothd and pulseaudio: /usr/libexec/bluetooth/bluetoothd -d & pulseaudio --system --realtime & To verify if the pulseaudio has been set up correctly, you can play a local wave file by using the following command. If you can hear the sound, the system should have been configured correctly. paplay -vvv audio8k16S.wav After setting up the pulseaudio, launch bluetoothctl to pair and connect to a mobile phone. After connecting to a mobile phone, you should be able to see the following information in bluetoothctl console: [bluetooth]# show Controller 12:60:41:7F:03:00         Name: BlueZ 5.21         Alias: BlueZ 5.21         Class: 0x1c0000         Powered: yes         Discoverable: no         Pairable: yes         UUID: PnP Information           (00001200-0000-1000-8000-00805f9b34fb)         UUID: Generic Access Profile    (00001800-0000-1000-8000-00805f9b34fb)         UUID: Generic Attribute Profile (00001801-0000-1000-8000-00805f9b34fb)         UUID: A/V Remote Control        (0000110e-0000-1000-8000-00805f9b34fb)         UUID: A/V Remote Control Target (0000110c-0000-1000-8000-00805f9b34fb)         UUID: Message Notification Se.. (00001133-0000-1000-8000-00805f9b34fb)         UUID: Message Access Server     (00001132-0000-1000-8000-00805f9b34fb)         UUID: Phonebook Access Server   (0000112f-0000-1000-8000-00805f9b34fb)         UUID: IrMC Sync                 (00001104-0000-1000-8000-00805f9b34fb)         UUID: OBEX File Transfer        (00001106-0000-1000-8000-00805f9b34fb)         UUID: OBEX Object Push          (00001105-0000-1000-8000-00805f9b34fb)         UUID: Vendor specific           (00005005-0000-1000-8000-0002ee000001)         UUID: Audio Source              (0000110a-0000-1000-8000-00805f9b34fb)         UUID: Audio Sink                (0000110b-0000-1000-8000-00805f9b34fb)         Modalias: usb:v1D6Bp0246d0515         Discovering: no If you can see the audio sink UUID, you are ready to enjoy the bluetooth music now.

   The purpose of this article is to describe how to join together the Processor Expert and ARM GCC toolchain under Eclipse environment.    Freescale provides the Processor Expert, which contains the Pin Settings Tool to support an easy way to configure pin signals, from multiplexing to the electrical properties of pins. With such Tool all the pins can be configured with a graphical user interface, and then generate C code, in order to use it as an example in applications. Please refer to the following Web for more details. http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PROCESSOR-EXPERT-IMX   The Processor Expert Software for i.MX Processors (Version 1.0) does not include a compiler or linker. Customers should merge the generated code into a build system.   However, it is possible to use common Eclipse-based IDE for the Processor Expert (V 1.0) and GNU ARM “C” toolchains. In particular, the following sequence may be implemented for both Linux and Windows hosts. 1. Install Eclipse (Kepler release) IDE for C/C++ Developers. https://eclipse.org/downloads/packages/eclipse-ide-cc-developers/keplersr2 2. Add Eclipse Processor Expert plug-in, as recommended in the documentation. http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=PROCESSOR-EXPERT-IMX https://community.freescale.com/docs/DOC-101470 3.  Add GNU ARM Eclipse, which contains configurations for different toolchains, including Linux ones. http://gnuarmeclipse.livius.net/blog/plugins-install/ 4. Install appropriate toolchain. For bare-metal applications Sourcery CodeBench Lite for ARM is sutable one. Sourcery CodeBench Lite Edition including ARM GCC IDE - Mentor Graphics Please use Getting Started Guide document from the CodeBench Lite package, that explains how to install and build applications with the CodeBench Lite.    As an example, let’s consider minimal startup code for i.MX6Q (LED flickering project on i.MX6Q SDB / SDP). Assuming Eclipse IDE with the Processor Expert and GNU ARM tools is installed, we should create new “C” project under Eclipse : New -> C Project. Select “Empty Project” and “Cross ARM GCC”, enter “Project name”. Then : select “Advanced settings” -> C/C++ Build -> Settings Tab “Target Processor” : ARM Family : cortex – a9 Architecture : armv7-a Instruction set : ARM (-marm) Endianness : Little endian (-mlittle-endian) FloatABI : Library with FP (softfp) FPU Type : neon Unaligned access : Disabled (-mno-unaligned-access) “Cross ARM GNU Create Flash Image” : General : Raw binary. TAB “Toolchains” : Name : Sourcery CodeBench Lite for ARM EABI (arm-none-eabi-gcc) (If needed customers can select appropriate toolchain) Architecture : ARM (AArch32) Prefix : arm-none-eabi Check “Use global toolchain path” or select the required path directly.  Source codes may added via Eclipse : File -> Import -> File System -> From directory Example source is enclosed. After sources as included in the project, let’s configure linker options via project properties, C/C++ Build -> Settings -> Tool Settings -> Cross ARM C Linker -> General. Add script file “mx6dq.ld”, uncheck “Remove unused section”, check “Do not use standard start files”.   Note, the article of Miro Samek is very helpful in clarifying of startup code and linker script. Please refer to “Building Bare-Metal ARM Systems with GNU”. Article Published online at www.Embedded.com,  July/August 2007. So, now we can build the project : Project -> Build Project. Two executable file will be generated : test.elf (for JTAG debugger) and test.bin, which may be used to create bootable SD card, using cfimager-imx.exe utility : CMD> cfimager-imx -o 0 -f test.bin -d g: Please use readme files in the enclosed for more details.

Here is a quick summary at booting a Linux system on the i.MX 6 Sabre SD platform, through USB. This assumes you have a "working" Linux development environment at hand (e.g. Debian), and that your are able to build a working Linux system with buildroot already, as explained in this post. You will also need libusb-1.0 development files (headers and libraries), as well as root/sudo permissions to access USB peripherals. Also, we will use the fine imx_usb_loader tool that the nice folks at Boundary Devices have developed for their i.MX 5/6 boards, as it works fine for Sabre sd as well. Get buildroot sources We will use git to fetch buildroot sources: $ git clone git://git.busybox.net/buildroot This should create a buildroot directory with all the latest sources (after a while). Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l '201*', and git checkout <the-desired-tag>. Compile buildroot The beauty of buildroot is that it will take care of everything for you, including preparing a cross compiler. You can configure buildroot for Sabre SD by doing: $ cd buildroot $ make freescale_imx6sabresd_defconfig By default this would generate binaries suitable for booting with an SD card, so we need to tweak a few settings to obtain a ramdisk, which u-boot will like. Summon the configuration menu with the following command: $ make menuconfig Descend into the "Filesystem images" submenu, and select the following buildroot options: cpio the root filesystem (for use as an initial RAM filesystem) Compression method (gzip) Create U-Boot image of the root filesystem Exit, saving your configuration. You might want to verify that you have indeed the the correct options in your .config: $ grep '^BR2_TARGET_ROOTFS_CPIO' .config This should return the following: BR2_TARGET_ROOTFS_CPIO=y BR2_TARGET_ROOTFS_CPIO_GZIP=y BR2_TARGET_ROOTFS_CPIO_UIMAGE=y You may then proceed with the build: $ make This should download and build everything, so it will take a while. Note that, as bryanthomas pointed out, there are no files for the sabre sd in the boards folder. This is because no patches or custom kernel configurations are needed outside of what is defined in the defconfig. So the only place the sabre sd board lives in buildroot is in the configs directory. At the time of writing we still need a small final hack to have Linux boot on /init instead of its default /linuxrc for proper boot on ramdisk, though. Hopefully this should be addressed in a future buildroot version, and a patch is on his way, but for now we change the boot script in our target filesystem with: $ cd output/target $ ln -svf init linuxrc $ cd ../.. $ make All build results will fall under the output/images folder. We are most interested in the following pieces: output/images/ +- imx6q-sabresq.dtb +- rootfs.cpio.uboot +- u-boot.imx `- uImage Get imx_usb_loader sources We will use git to fetch imx_usb_loader sources: $ git clone git://github.com/boundarydevices/imx_usb_loader.git This should create an imx_usb_loader directory with all the latest sources. Compile imx_usb_loader Assuming your Linux development environment has the necessary libusb-1.0 headers and libraries, you can simply build by doing: $ cd imx_usb_loader $ make This should compile an imx_usb tool in the current folder. Prepare your payload and configuration First, copy all the necessary buildroot generated items to the imx_usb_loader directory. You will need: u-boot.imx uImage imx6q-sabresd.dtb rootfs.cpio.uboot Now we need to explain to imx_usb what we want to download to the i.MX romcode through USB. Add the following lines in the end of the mx6_usb_work.conf: ... u-boot.imx:dcd,plug uImage:load 0x12000000 rootfs.cpio.uboot:load 0x12C00000 imx6q-sabresd.dtb:load 0x18000000 u-boot.imx:clear_dcd,jump header The first line with dcd, plug uses u-boot header to configure the DDR3 memory, allowing us to download contents to the Sabre SD memory. This is exactly what the three subsequent lines with load directives do. The last line re-uses u-boot one more time to find out the address where to jump (jump header directive), but not touching the DDR configuration any more thanks to the clear_dcd directive (thanks jeanmariepons-b46892 for the tips) . Look at the comments in mx6_usb_work.conf for (a bit) more details on the various directives available. Also, note that all the absolute addresses mentioned above are what u-boot needed at the time of writing. Hopefully this should be fairly stable. Boot through USB! We are all set for booting now. Connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data. Connect also your PC to the USB OTG port of the Sabre SD, and make sure you have no SD card inserted and power up the platform. The Sabre SD should not boot into an operating system, but rather wait for a payload to download through USB. You might want to verify that it is indeed waiting with the following command: $ lsusb In the resulting output, there should be a line like the following: Bus 001 Device 098: ID 15a2:0054 Freescale Semiconductor, Inc. i.MX 6Dual/6Quad SystemOnChip in RecoveryMode On your PC, start the download of our "payload" to your Sabre SD with: $ sudo ./imx_usb (Note that you need proper permissions to do that.) After download of all the pieces, u-boot should start in its "mfgtools mode", as reflected by the following messages on UART: ... Boot from USB for mfgtools Use default environment for mfgtools Run bootcmd_mfg: run mfgtool_args;bootm ${loadaddr} ${initrd_addr} ${fdt_addr}; ... The Linux kernel should then start, and your buildroot system should reach a prompt: ... Welcome to Buildroot buildroot login: From there you may login as root. Enjoy! See also... This post details the buildroot steps a bit more. This post explains how to build a ramdisk for i.MX6 with busybox directly. AdeneoEmbedded - Whitepaper on USB loader for i.MX6 platforms imx_usb_loader README on github Buildroot: making embedded Linux easy

Important: If you have any questions or would like to report any issues with the DDR tools or supporting documents please create a support ticket in the i.MX community. Please note that any private messages or direct emails are not monitored and will not receive a response. i.MX 6/7 Series Family DDR Tools Overview This page contains the latest releases for the i.MX 6/7 series DDR Tools. The tools described on this page cover the following i.MX 6/7 series SoCs: i.MX 6DQP (Dual/Quad Plus) i.MX 6DQ (Dual/Quad) i.MX 6DL/S (Dual Lite/Solo) i.MX 6SoloX i.MX 6SL i.MX 6SLL i.MX 6UL i.MX 6ULL/ULZ i.MX 7D/S i.MX 7ULP The purpose of the i.MX 6/7 series DDR Tools is to enable users to generate and test a custom DRAM initialization based on their device configuration (density, number of chip selects, etc.) and board layout (data bus bit swizzling, etc.). This process equips the user to then proceed with the bring-up of a boot loader and an OS. Once the OS is brought up, it is recommended to run an OS-based memory test (like Linux memtester) to further verify and test the DDR memory interface. The i.MX 6/7 series DDR Tools consist of: DDR Register Programming Aid (RPA) DDR Stress test _________________________________________________________ i.MX 6/7 Series DDR Stress Test The i.MX 6/7 Series DDR stress test tool is a Windows-based software tool that is used as a mechanism to verify that the DDR initialization is operational prior for use in u-boot and OS bring-up. The DDR Stress Test tool can be found here: i.MX 6/7 DDR Stress Test Tool Note that the DDR Stress test tool supports all of the above i.MX SoCs, however, some of the supported i.MX SoCs named in the tool support multiple i.MX SoCs as follows: MX6DQ – when selected, this supports both i.MX 6DQ and i.MX 6DQP (Plus) MX6DL – when selected, this supports both i.MX 6DL and i.MX 6S (i.MX 6DLS family) MX6ULL – when selected, this supports both i.MX 6ULL and i.MX6 ULZ MX7D – when selected, this supports both i.MX 7D and i.MX 7S _____________________________________________________________________________ i.MX 6/7 Series DDR Register Programming Aid (RPA) The i.MX 6/7 series DDR RPA (or simply RPA) is an Excel spreadsheet tool used to develop DDR initialization for a user’s specific DDR configuration (DDR device type, density, etc.). The RPA generates the DDR initialization script for use with the DDR Stress Test tool. For a history of the previous versions of an RPA, refer to the Revision History tab of the respective RPA. To obtain the latest RPAs, please refer to the following links: i.MX 6DQP i.MX6DQP Register Programming Aids i.MX 6DQ i.MX6DQ Register Programming Aids i.MX 6DL/S i.MX6DL Register Programming Aids i.MX 6SoloX i.MX6SX Register Programming Aids i.MX 6SL i.MX6SL Register Programming Aids  i.MX6SLL i.MX6SLL Register Programming Aids i.MX 6UL/ULL/ULZ i.MX6UL/ULL/ULZ DRAM Register Programming Aids i.MX7D i.MX7D DRAM Register Programming Aids i.MX 7ULP i.MX7ULP DRAM Register Programming Aids _____________________________________________________________________________ DRAM Register Programming Aids FAQ    

Here we show how to generate a minimal root filesystem fairly quickly with BusyBox, for the i.MX6 sabre sd platform. This document assumes you are able to boot a Linux kernel on your platform already. See this post for details on how to do it. This implies you already have a "working" Linux development environment with some ARM cross-compilers at hand (e.g. Debian + Emdebian). busybox is so small that we will go for a ramdisk as our main root filesystem. Get busybox sources We will use git to fetch busybox sources:   $ git clone git://git.busybox.net/busybox This should create a busybox directory with all the latest sources. Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l, and git checkout <the-desired-tag>. Compile Assuming your cross compiler is called e.g. arm-linux-gnueabihf-gcc, you can compile by doing:   $ cd busybox   $ export ARCH=arm   $ export CROSS_COMPILE=arm-linux-gnueabihf-   $ make defconfig   $ sed -i.orig 's/^#.*CONFIG_STATIC.*/CONFIG_STATIC=y/' .config   $ make   $ make install This should create an _install folder hierarchy containing binaries and links. Note that we force the build of a static binary with the sed command. Configure the root filesystem We need to add some more configuration into the _install folder before we can call it a minimal filesystem. Create some folders We need to create some mountpoints and folders:   $ mkdir _install/dev   $ mkdir _install/proc   $ mkdir _install/sys   $ mkdir -p _install/etc/init.d Add some configuration files and scripts We need to prepare the main init configuration file, _install/etc/inittab, with this contents:   ::sysinit:/etc/init.d/rcS   ::askfirst:/bin/sh   ::ctrlaltdel:/sbin/reboot   ::shutdown:/sbin/swapoff -a   ::shutdown:/bin/umount -a -r   ::restart:/sbin/init This is very close to the default behavior busybox init has with no inittab file. It just suppresses some warnings about missing tty. We need to add some more configuration to mount a few filesystems at boot for convenience. This is done with an _install/etc/fstab file containing:   proc     /proc proc     defaults 0 0   sysfs    /sys  sysfs    defaults 0 0   devtmpfs /dev  devtmpfs defaults 0 0 We also need to actually trigger the mount in the _install/etc/init.d/rcS script, which is called from the inittab. It should contain:   #!/bin/sh   mount -a And we need to make it executable:   $ chmod +x _install/etc/init.d/rcS Generate the ramdisk contents Now that we have adapted the root filesystem contents, we can generate a busybox ramdisk image for u-boot with the following commands:   $ (cd _install ; find |cpio -o -H newc |gzip -c > ../initramfs.cpio.gz)   $ mkimage -A arm -T ramdisk -d initramfs.cpio.gz uInitrd This results in a uInitrd file, suitable for u-boot. Prepare a boot script The default u-boot commands are not sufficient to boot our system, so we need to edit a boot.txt file with the following contents:   run loaduimage   run loadfdt   setenv rdaddr 0x13000000   fatload mmc ${mmcdev}:$mmcpart $rdaddr uInitrd   setenv bootargs console=${console},${baudrate} rdinit=/sbin/init   bootm $loadaddr $rdaddr $fdt_addr Then we generate a boot.scr script, which can be loaded by u-boot with:   $ mkimage -A arm -T script -d boot.txt boot.scr Put on SD card Assuming you have prepared your SD card with u-boot and Linux as explained in this post, you have a single FAT partition on your card with your kernel and dtb. Our boot script and ramdisk image should be copied alongside:   $ mount /dev/<your-sd-card-first-partition> /mnt   $ cp uInitrd boot.scr /mnt/   $ umount /mnt Your SD card first partition is typically something in /dev/sd<X>1 or /dev/mmcblk<X>p1. Note that you need write permissions on the SD card for the command to succeed, so you might need to su - as root, or use sudo, or do achmod a+w as root on the SD card device node to grant permissions to users. Boot! Your SD card is ready for booting. Insert it in the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. Your busybox system should boot to a prompt:   ...   Freeing unused kernel memory: 292K (806d5000 - 8071e000)   Please press Enter to activate this console. After pressing enter you should have a functional busybox shell on the target. Enjoy! See also... For a more featured root filesystem you might want to try a Debian filesystem in a second SD card partition, as explained in this post, or generate your filesystem with Buildroot. If you plan to compile busybox often, you might want to use a C compiler cache; see this post.

The i.MX Android O8.0.0_1.0.0 GA release is now available from IMX_SW page. Overview -> BSP Updates and Releases -> Android 8.0.0 Oreo (O8.0.0_1.0.0, 4.9 kernel)   Files available: # Name Description 1 android_O8.0.0_1.0.0_docs.tar.gz i.MX Android O8.0.0_1.0.0 BSP Documentation 2 imx-o8.0.0_1.0.0_ga.tar.gz i.MX Android O8.0.0_1.0.0 proprietary surce code for i.MX 6QuadPlus, i.MX 6Quad, i.MX 6DualPlus, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo  i.MX 6Sololite, i.MX6SX and i.MX7D 3 android_O8.0.0_1.0.0_image_6dqpsabreauto.tar.gz Binary Demo Files of Android O8.0.0_1.0.0 BSP - SABRE for Automotive Infotainment based on i.MX 6QuadPlus, i.MX 6Quad, and i.MX 6DualLite 4 android_O8.0.0_1.0.0_image_6dqpsabresd.tar.gz Binary Demo Files of Android O8.0.0_1.0.0 BSP - SABRE Platform and SABRE Board based on i.MX 6QuadPlus, i.MX 6Quad and i.MX 6DualLite. 5 android_O8.0.0_1.0.0_image_6slevk.tar.gz Binary Demo Files of Android O8.0.0_1.0.0 BSP - i.MX 6Sololite evaluation kit. 6 android_O8.0.0_1.0.0_image_6sxsabresd.tar.gz Binary Demo Files of Android O8.0.0_1.0.0 BSP - SABRE Board based on i.MX 6SoloX 7 android_O8.0.0_1.0.0_image_6sxsabreauto.tar.gz Binary Demo Files of Android O8.0.0_1.0.0 BSP - SABRE for Automotive infotainment based on i.MX 6SoloX 8 android_O8.0.0_1.0.0_image_7dsabresd.tar.gz Binary Demo Files of Android O8.0.0_1.0.0 BSP - SABRE Board based on i.MX 7Dual 9 fsl_aacp_dec_O8.0.0_1.0.0.tar.gz AAC Plus Codec for O8.0.0_1.0.0 10 android_O8.0.0_1.0.0_tools.tar.gz Manufacturing Toolkit and VivanteVTK for O8.0.0_1.0.0   Supported Hardware SoC/Boards: i.MX 6Quad, i.MX 6QuadPlus, and i.MX 6DualLite SABRE-SD board and platform i.MX 6Quad, i.MX 6QuadPlus, and i.MX 6DualLite SABRE-AI board and platform i.MX 6SoloLite EVK platform i.MX 6SoloX SABRE-SD board and platforms i.MX 6SoloX SABRE-AI board and platforms i.MX 7Dual SABRE-SD board and platform   Changes: Compared to the N7.1.2_2.0.0 release, this release has the following major changes: Upgraded the Android code base from android-7.1.2_r9 to android-8.0.0_r25. Removed the device partition and added the vendor partition. Enabled ION-based gralloc and EGL. Feature: For features please consult the release notes.   Known issues For known issues and more details please consult the Release Notes.

All, This document will help you to understand the " YOCTO PROJECT COMMUNITY LAYERS" and the "YOCTO PROJECT FREESCALE OFFICIAL RELEASE" differences and where the layer content is coming from.   Best Regards, Luis