This document provide an overall guide how to get started with i.MX6 development. There are several chapters: 1. how to get necessary docs from freescale website; 2. how to setup environment and build your own images;3. Hardware design consideration;4. How to get help. I hope the doc will bring you in i.MX world more easily, and hope you all have a fun in it.

Q: Q&A: Where to find IBIS Models on the web? A: In the first figure (FSL driving 100 ohm), the processor is DC coupled to a transmission line and terminated at the far end with a 100-ohm resistor. The results look pretty normal for this. In the other figure, the processor is dc coupled to a transmission line, then ac coupled to another transmission line segment (0.1u) with 50-ohm resistors to ground, and then drives the inputs of an HCSL clock buffer. The results are pretty un remarkable. The top red signal in the trace is one of the IMX6 clock outputs, the first green signal is the other clock output, and the last green signal (from top to bottom that is) is the differential signal seen by the clock buffer. The customer is concerned about the asymmetrical drive of the processor. It looks like LVDS clock outputs do not like to be AC coupled. This simulation resembles the way the clock is handled in the Smart Device schematics where the clock is AC coupled to the reference clock inputs on the PCIE connector. The ibis files were downloaded from the web (21x21_imx6q, consumer variant). So a few updates: I had the customer download the latest duallite IBIS models. Previously they were apparently using the quad/dual models. They are going to update HyperLynx and are going to run a simulation and let me know if they still see the same issue. He said he's using "linesim". Meanwhile he noticed a different problem with the duallite/solo IBIS models. Although the datasheet says LVDDR3 (1.35V) is supported, there is no model for DDR3_L either as input or output. The same model existed in the quad/dual models. Do you know why this option is not in the duallite IBIS models? Thanks! A ctm of mine would like to get the IBIS model with LVDDR3 support on the i.MX6 DL. For mx6-duallite IBIS models for DDR3L memory (1.35V). It'd be great if the models matched the quad version. Please find the new updated IBIS file in website. http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6DL&nodeId=018rH3ZrDRB24A&fpsp=1&tab=Design_Tools_Tab

We use PCIe to connect Intersil TW6865 chip for the surround view solution. This is the connection of PCIe to iMX6Q SabreSD board.   This is the block diagram of the connection: This is the 4 camera surround view:   Code base is L3.0.35_12.10.02 release. You can merge the patch file to the latest Freescale release. Please check the attach file for the patch code.   Note:  It is only a test version. The last code for L3.0.35 BSP: L3.0.35_GA4.1.0 Patches.7z The last code for L3.10.53 BSP: L3.10.53_TW686x_patch.7z Patch for L4.1.15 1.1.0 GA BSP: TW6865 driver for Linux L4.1.15_1.1.0-ga.7z

Here we show how to generate a minimal root filesystem fairly quickly with BusyBox, for the i.MX6 sabre sd platform. This document assumes you are able to boot a Linux kernel on your platform already. See this post for details on how to do it. This implies you already have a "working" Linux development environment with some ARM cross-compilers at hand (e.g. Debian + Emdebian). busybox is so small that we will go for a ramdisk as our main root filesystem. Get busybox sources We will use git to fetch busybox sources:   $ git clone git://git.busybox.net/busybox This should create a busybox directory with all the latest sources. Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l, and git checkout <the-desired-tag>. Compile Assuming your cross compiler is called e.g. arm-linux-gnueabihf-gcc, you can compile by doing:   $ cd busybox   $ export ARCH=arm   $ export CROSS_COMPILE=arm-linux-gnueabihf-   $ make defconfig   $ sed -i.orig 's/^#.*CONFIG_STATIC.*/CONFIG_STATIC=y/' .config   $ make   $ make install This should create an _install folder hierarchy containing binaries and links. Note that we force the build of a static binary with the sed command. Configure the root filesystem We need to add some more configuration into the _install folder before we can call it a minimal filesystem. Create some folders We need to create some mountpoints and folders:   $ mkdir _install/dev   $ mkdir _install/proc   $ mkdir _install/sys   $ mkdir -p _install/etc/init.d Add some configuration files and scripts We need to prepare the main init configuration file, _install/etc/inittab, with this contents:   ::sysinit:/etc/init.d/rcS   ::askfirst:/bin/sh   ::ctrlaltdel:/sbin/reboot   ::shutdown:/sbin/swapoff -a   ::shutdown:/bin/umount -a -r   ::restart:/sbin/init This is very close to the default behavior busybox init has with no inittab file. It just suppresses some warnings about missing tty. We need to add some more configuration to mount a few filesystems at boot for convenience. This is done with an _install/etc/fstab file containing:   proc     /proc proc     defaults 0 0   sysfs    /sys  sysfs    defaults 0 0   devtmpfs /dev  devtmpfs defaults 0 0 We also need to actually trigger the mount in the _install/etc/init.d/rcS script, which is called from the inittab. It should contain:   #!/bin/sh   mount -a And we need to make it executable:   $ chmod +x _install/etc/init.d/rcS Generate the ramdisk contents Now that we have adapted the root filesystem contents, we can generate a busybox ramdisk image for u-boot with the following commands:   $ (cd _install ; find |cpio -o -H newc |gzip -c > ../initramfs.cpio.gz)   $ mkimage -A arm -T ramdisk -d initramfs.cpio.gz uInitrd This results in a uInitrd file, suitable for u-boot. Prepare a boot script The default u-boot commands are not sufficient to boot our system, so we need to edit a boot.txt file with the following contents:   run loaduimage   run loadfdt   setenv rdaddr 0x13000000   fatload mmc ${mmcdev}:$mmcpart $rdaddr uInitrd   setenv bootargs console=${console},${baudrate} rdinit=/sbin/init   bootm $loadaddr $rdaddr $fdt_addr Then we generate a boot.scr script, which can be loaded by u-boot with:   $ mkimage -A arm -T script -d boot.txt boot.scr Put on SD card Assuming you have prepared your SD card with u-boot and Linux as explained in this post, you have a single FAT partition on your card with your kernel and dtb. Our boot script and ramdisk image should be copied alongside:   $ mount /dev/<your-sd-card-first-partition> /mnt   $ cp uInitrd boot.scr /mnt/   $ umount /mnt Your SD card first partition is typically something in /dev/sd<X>1 or /dev/mmcblk<X>p1. Note that you need write permissions on the SD card for the command to succeed, so you might need to su - as root, or use sudo, or do achmod a+w as root on the SD card device node to grant permissions to users. Boot! Your SD card is ready for booting. Insert it in the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. Your busybox system should boot to a prompt:   ...   Freeing unused kernel memory: 292K (806d5000 - 8071e000)   Please press Enter to activate this console. After pressing enter you should have a functional busybox shell on the target. Enjoy! See also... For a more featured root filesystem you might want to try a Debian filesystem in a second SD card partition, as explained in this post, or generate your filesystem with Buildroot. If you plan to compile busybox often, you might want to use a C compiler cache; see this post.

Here we show how to bootstrap the Debian Linux distribution from a PC to the i.MX6 sabre sd platform. While bootstrapping Debian on any architecture "natively" is pretty straightforward, "cross-bootstrapping" requires some techniques that we will explain. This document assumes you are able to boot a Linux kernel on your platform already. See this post for details on how to do it. Also, this document assumes you are using a Debian PC for preparing your SD card. You will require the following packages to be installed: binfmt-support qemu-user-static debootstrap Note: all the commands found in the following steps need to be run as root. Formatting the SD card We need to format the SD card with two partitions; one small FAT partition to contain the Linux kernel and its dtb, and one large ext4 partition, which will contain the root filesystem with the Debian userspace. Also, we need to make sure we leave some space for u-boot starting from offset 1024B. Here is an example SD card layout:   +-----+------+--------+-----+---------------+-----------------   | MBR |  ... | u-boot | ... | FAT partition | Linux partition ...   +-----+------+--------+-----+---------------+-----------------   0     512    1024           1M              ~257M (offsets in bytes) Here is an example SD card layout, as displayed by fdisk:   Device    Boot      Start         End      Blocks   Id  System   /dev/sdc1            2048      526335      262144    c  W95 FAT32 (LBA)   /dev/sdc2          526336     8054783     3764224   83  Linux (units: 512B sectors) You can format and mount the Linux partition with:   # mkfs.ext4 /dev/<your-sd-card-second-partition>   # mount /dev/<your-sd-card-second-partition> /mnt Your SD card second partition is typically something in /dev/sd<X>2 or /dev/mmcblk<X>p2. Do not forget to install u-boot and a Linux kernel as explained in those posts. Bootstrapping Debian First stage The first stage of Debian bootstrapping is done with:   # debootstrap --foreign --arch=armhf testing /mnt This will retrieve the base Debian packages from the internet, and perform a first stage of installation:   I: Retrieving Release   I: Retrieving Release.gpg   I: Checking Release signature   I: Valid Release signature (key id A1BD8E9D78F7FE5C3E65D8AF8B48AD6246925553)   I: Validating Packages   I: Resolving dependencies of required packages...   I: Resolving dependencies of base packages...   I: Found additional required dependencies: insserv libbz2-1.0 libcap2 libdb5.1 libsemanage-common libsemanage1 libslang2 libustr-1.0-1   I: Found additional base dependencies: libee0 libept1.4.12 libestr0 libgcrypt11 libgnutls-openssl27 libgnutls26 libgpg-error0 libidn11 libjson-c2 liblognorm0 libmnl0 libnetfilter-acct1 libnfnetlink0 libp11-kit0 libsqlite3-0 libtasn1-3 libxapian22   I: Checking component main on http://ftp.us.debian.org/debian...   (...)   I: Extracting util-linux...   I: Extracting liblzma5...   I: Extracting zlib1g... At this point, the necessary tools for second stage of installation are under /mnt/debootstrap/. Second stage The second stage needs to run natively; on an arm platform, that is. But we can use the combination of two techniques to perform this stage on the PC anyway:   # cp /usr/bin/qemu-arm-static /mnt/usr/bin/   # chroot /mnt /debootstrap/debootstrap --second-stage Those commands copy an arm emulator on the target filesystem, and use the chroot command to execute the second stage of the installation into the SD card, on the PC, with transparent emulation:   I: Installing core packages...   I: Unpacking required packages...   I: Unpacking libacl1:armhf...   I: Unpacking libattr1:armhf...   I: Unpacking base-files...   (...)   I: Configuring tasksel...   I: Configuring tasksel-data...   I: Configuring libc-bin...   I: Base system installed successfully. You can now remove /mnt/usr/bin/qemu-arm-static, or keep it for later, subsequent chroot under emulation. Finetuning the root filesystem For development it is handy to remove the root password on the target by removing the '*' from /mnt/etc/shadow on the SD card:   root::15880:0:99999:7::: Also, we can add the following line in /mnt/etc/inittab to obtain a login prompt on the UART:   T0:23:respawn:/sbin/getty -L ttymxc0 115200 vt100 You can now unmount the filesystem with:   # umount /mnt Boot! Your SD card is ready for booting. Insert it in the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. At the time of writing u-boot tells the kernel to boot from the wrong partition by default, so we need to interrupt by pressing enter at u-boot prompt for the first boot and setup u-boot environment to fix this:   U-Boot > setenv mmcroot /dev/mmcblk0p2 rootwait rw   U-Boot > saveenv   Saving Environment to MMC...   Writing to MMC(1)... done As this is saved in the SD card it need only to be done once at first boot. You can reboot your board or type boot; your Debian system should boot to a prompt:   (...)   [ ok ] Starting periodic command scheduler: cron.   [ ok ] Running local boot scripts (/etc/rc.local).   Debian GNU/Linux jessie/sid debian ttymxc0   debian login: From there you may login as root. It is recommended to setup the network connection and install an ssh server inside the target for further development. Enjoy! See also... With the amounts of memory we have today in the systems, it is even possible to boot Debian in a ramdisk. See this post about busybox for the ramdisk generation. Another way of generating a root filesystem is by building it with buildroot. See and this post for details.

ccache is a C compiler cache. ccache can save a large amount of compilation time on recurring builds and builds restarted from a clean repository after make clean or git clean. It is well suited for e.g. u-boot and Linux compilation. Caching the host compiler Caching "native" builds is easily done by adding in the beginning of your $PATH a special directory, which contains links to ccache to override the usual compiler. On e.g. Debian this directory is readily available as /usr/lib/ccache, So you can do:   $ export PATH="/usr/lib/ccache:$PATH" Typical links found in this folder are:   c++ -> ../../bin/ccache   cc -> ../../bin/ccache   g++ -> ../../bin/ccache   gcc -> ../../bin/ccache etc... Caching the cross compiler Caching cross-compiled builds can be done in the same way as native builds, provided you create links of the form e.g. arm-linux-gnueabihf-gcc pointing to ccache. But there is an even more convenient way for those projects, which rely on a $CROSS_COMPILE environment variable (as is the case for e.g. u-boot and Linux). You can prefix the cross compiler with ccache there in e.g. the following way:   $ export CROSS_COMPILE="ccache arm-linux-gnueabihf-" Monitoring efficiency Now that your builds are cached, you might want to see how much is "spared" with this technique. ccache -s will tell you all sorts of statistics, such as:   cache directory                     /home/vstehle/.ccache   cache hit (direct)                 10852   cache hit (preprocessed)            3225   cache miss                         19000   called for link                    33267   called for preprocessing            9463   compile failed                         3   preprocessor error                     1   couldn't find the compiler           117   unsupported source language          921   unsupported compiler option         2167   no input file                      31681   files in cache                     51694   cache size                           1.3 Gbytes   max cache size                       4.0 Gbytes Here you see a somewhat typical 50%/50% hit/miss ratio. Enjoy! See Also ccache is usually supported natively by build systems, such as Buildroot or Yocto.

Here is a quick summary at booting Linux on the i.MX 6 sabre sd platform. This assumes you already have u-boot working on your platform as described here. This implies you already have a "working" Linux development environment with some ARM cross-compilers at hand (e.g. Debian + Emdebian). Get Linux sources We will use git to fetch Linux sources:   $ git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git This should create a linux directory with all the latest sources (after a while). Note that for more stability you might want to checkout a release instead of the latest version; to do so, list the available release tags with e.g. git tag -l 'v*', and git checkout <the-desired-tag>. Compile Assuming your cross compiler is called e.g. arm-linux-gnueabihf-gcc, you can compile by doing:   $ cd linux   $ export ARCH=arm   $ export CROSS_COMPILE=arm-linux-gnueabihf-   $ make imx_v6_v7_defconfig   $ make You then need to supply a LOADADDR (as joowonkim pointed out); do:   $ make uImage LOADADDR=0x10008000 This should create a number of files, including arch/arm/boot/uImage and arch/arm/boot/dts/imx6q-sabresd.dtb. Put on SD We need a proper FAT partition on the SD card, from which u-boot will be able to load the kernel and dtb. Also, we need to make sure we leave some space for u-boot starting from offset 1024B. Here is an example SD card layout:   +-----+------+--------+-----+----------------   | MBR |  ... | u-boot | ... | FAT partition ...   +-----+------+--------+-----+----------------   0     512    1024           1M (offsets in bytes) Here is an example SD card layout, as displayed by fdisk:   Device    Boot      Start         End      Blocks   Id  System   /dev/sdc1            2048     8054783     4026368    c  W95 FAT32 (LBA) (units: 512B sectors) You can format the FAT partition, mount, copy and unmount with:   $ mkfs.vfat /dev/<your-sd-card-first-partition>   $ mount /dev/<your-sd-card-first-partition> /mnt   $ cp arch/arm/boot/uImage arch/arm/boot/dts/imx6q-sabresd.dtb /mnt/   $ umount /mnt Your SD card first partition is typically something in /dev/sd<X>1 or /dev/mmcblk<X>p1. Note that you need write permissions on the SD card for the command to succeed, so you might need to su - as root, or use sudo, or do a chmod a+w as root on the SD card device node to grant permissions to users. Also, be sure to have u-boot on the SD card as explained in this post. Boot! That's it; u-boot already knows how to deal with your kernel by default so you are good to go. Insert the SD card into the SD card slot of your i.MX6 sabre sd platform, connect to the USB to UART port with a serial terminal set to 115200 baud, no parity, 8bit data and power up the platform. You should see u-boot messages:   U-Boot 2013.07-rc1-00014-g74771f4 (Jun 21 2013 - 16:27:39) u-boot should load the uImage and dtb from SD card and boot the kernel:   (...)   reading uImage   4215344 bytes read in 449 ms (9 MiB/s)   Booting from mmc ...   reading imx6q-sabresd.dtb   22818 bytes read in 22 ms (1012.7 KiB/s)   ## Booting kernel from Legacy Image at 12000000 ...      Image Name:   Linux-3.10.0-rc6      Image Type:   ARM Linux Kernel Image (uncompressed)      Data Size:    4215280 Bytes = 4 MiB      Load Address: 10008000      Entry Point:  10008000      Verifying Checksum ... OK   ## Flattened Device Tree blob at 11000000      Booting using the fdt blob at 0x11000000      Loading Kernel Image ... OK   OK      Using Device Tree in place at 11000000, end 11008921   Starting kernel ... The kernel should boot:   Booting Linux on physical CPU 0x0   Linux version 3.10.0-rc6 (vstehle@debian) (gcc version 4.7.2 (Debian 4.7.2-5) ) #1 SMP Fri Jun 21 18:09:26 CEST 2013 By default, the kernel will try to mount a root filesystem from the SD card second partition, as can be read in the default kernel command line:   (...)   Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk1p2 rootwait rw ...but we did not prepare a root filesystem partition, so after a number of boot messages the kernel will wait indefinitely:   (...)   mmc1: new SDHC card at address b368   (...)    mmcblk0: p1   (...)   Waiting for root device /dev/mmcblk1p2... We will see in another post how to prepare this root filesystem on the second SD card partition. Enjoy! See also... If you plan to compile Linux often, you might want to use a C compiler cache; see this post. Once you have Linux booting on your platform the next step is to give it a root filesystem. See this post for a Debian root filesystem, this post for a minimal busybox filesystem and this post for generating a root filesystem with buildroot.

There is GPU SDK for i.MX6D/Q/DL/S: IMX_GPU_SDK.  This is to share the experience when compiling the example code from the SDK with Linux BSP release: L3.0.35_1.1.0_121218 and  L3.0.35_4.0.0_130424 . Minimal profile is using and have been verified on both i.MX6Q SDP and i.MX6DL SDP. To start: Please make sure “gpu-viv-bin-mx6q” has been selected in the Package list and compiled to your rootfs. After finished the compilation of the rootfs, you should find some newly added libraries for GLES1.0, GLES2.0, OpenVG and EGL in <ltib>/rootfs/usr/lib However, you should find libOpenVG.so is actually copied from libOepnVG_3D.so: vmuser@ubuntu:~/ltib_src/ltib/rootfs/usr/lib$ ls -al libOpen* -rwxr-xr-x 1 root root 115999 2013-06-06 18:31 libOpenCL.so -rwxr-xr-x 1 root root 515174 2013-06-06 18:31 libOpenVG_355.so -rwxr-xr-x 1 root root 272156 2013-06-06 18:31 libOpenVG_3D.so -rwxr-xr-x 1 root root 272156 2013-06-06 18:31 libOpenVG.so So, in this way, i.MX6D/Q will no use libOpenVG_355.so in the build. Also, if you run NFS, the libOpenVG.so will change to symbolic link:           For example, run on i.MX6Q SDP, it will link to /usr/lib/libOpenVG_355.so                          For example, run on i.MX6DL SDP, it will link to /usr/lib/libOpenVG_3D.so                Then, when you compile the OpenVG example code, it is becoming very confusing.  Thus, it needs to pay attention when doing the compilation.  For example, delete the symbolic link and make copy of the corresponding library: For i.MX6D/Q, please do this: $ sudo /bin/rm libOpenVG.so $ sudo cp libOpenVG_355.so libOpenVG.so For i.MX6S/DL, please do this: $ sudo /bin/rm libOpenVG.so $ sudo cp libOpenVG_3D.so libOpenVG.so To compile the sample code in the GPU SDK, you could refer to iMXGraphicsSDK_OpenGLES2.0.pdf or iMXGraphicsSDK_OpenGLES1.1.pdf in ~/gpu_sdk_v1.00.tar/Documentation/Tutorials to set up the cross compilation environment; which is assuming the LTIB and the rootfs is ready. $ export ROOTFS=/home/vmuser/ltib_src/ltib/rootfs $ export CROSS_COMPILE=/opt/freescale/usr/local/gcc-4.6.2-glibc-2.13-linaro-multilib-2011.12/fsl-linaro-toolchain/bin/arm-none-linux-gnueabi- For OpenVG: $ cd ~/gpu_sdk_v1.00/Samples/OpenVG $ make -f Makefile.fbdev clean $ make -f Makefile.fbdev $ make -f Makefile.fbdev install The executable will then be copied to this directory: ~/gpu_sdk_v1.00/Samples/OpenVG/bin/OpenVG_fbdev For GLES2.0 $ cd ~/gpu_sdk_v1.00/Samples/ GLES2.0 $ make -f Makefile.fbdev clean $ make -f Makefile.fbdev $ make -f Makefile.fbdev install The executable will then be copied to this directory: ~/gpu_sdk_v1.00/Samples/ GLES2.0/bin/GLES20_fbdev For GLES1.1, please modify the Makefile.fbdev to remove the compilation of example codes "18_VertexBufferObjects" and "19_Beizer" that are not exist. Then, $ cd ~/gpu_sdk_v1.00/Samples/ GLES1.1 $ make -f Makefile.fbdev clean $ make -f Makefile.fbdev $ make -f Makefile.fbdev install The executable will then be copied to this directory: ~/gpu_sdk_v1.00/Samples/ GLES1.1/bin/GLES11_fbdev Finally, you could copy the executable to the rootfs and test on i.MX6Q SDP/SDB or i.MX6DL SDP board. NOTE: the newly added makefiles.tgz contains Makefile.x11 hacked from GLES2.0 example code to make OpenVG to compile and run on Ubuntu 11.10 rootfs.

The customer would like to test BT.656 using Test mode. Is it supported? 38.4.3.3 Test mode in RM shows only one CSIx_SENS_CONG setting. Does it mean Test mode support only one as follows? Does Test mode support other settings? CSIx_EXT_VSYNC = 0x1 CSIx_DATA_WIDTH = 0x1 CSIx_SENS_DATA_FORMAT = 0x0 CSIx_PACK_TIGHT = 0x0 CSIx_SENS_PRTCL = 0x1 CSIx_SENS_PIX_CLK_POL = 0x1 CSIx_DATA_POL = 0x0 CSIx_HSYNC_POL = 0x0 CSIx_VSYNC_POL = 0x0 For example, customer want to know if Test mode support  CSIx_SENS_PRTCL=0x2or 0x3 instead of 0x1? customer want to know if Test mode support CSIx_SENS_DATA_FORMAT=0x1or 0x2 instead of 0x0? Answer: CSI CM TEST MODE is working as below: 1,only ungated mode. 2,data width should be configured to 8 3,data format should be configured to rgb888 It cannot be other format such as bt656. It uses CSI1_TST_CTRL register to configure {R,G,B} 24 bit value and taking it as RGB888/YUV444 format for further process.  The generated image size is due to the configured width & height in the registers.

This patch release is target for LPDDR2 ( dual channels in interleave mode ) support on i.MX6DL platform. Two patches are prepared to modify u-boot and kernel in order to have correct DRAM init sequence, 400MHz & 24MHz frequency switching and suspend/resume support. The patches are not fully verified. It is provided as reference for customer to enable their i.MX6DL board with LPDDR2. Customization and Testing is needed by customer. We need to remind some points here: MMDC_MDCFG3LP in 24MHz need to increase the margin ( 0x40222 -> 0x80555 ) in order to pass the OS frequency switch stress test. We are identifying the reason but this workaround is working fine and included to the patch. Code changes in kernel is prepared so that it is compatible to DDR3. In other words, the DDR type will be detected and a correct handling will be done for LPDDR2 and DDR3. In LPDDR2 system, we can't put SDQ pin into LPM during suspend. Otherwise, the system cannot resume. Dual channels in fix mapping mode is not recommended to use.

The i.MX6 Multi-Mode DDR Controller (MMDC) has profiling capabilities to monitor the operation of the controller. The profiling capability counts certain events related to a specified AXI-ID during a profiling period. The events that can be counted are: The number of read accesses during the profiling period (MMDCx_MADPSR2[RD_ACC_COUNT] register field) The number of write accesses during the profiling period (MMDCx_MADPSR3[WR_ACC_COUNT] register field) The number of bytes read during the profiling period (MMDCx_MADPSR4[RD_BYTES_COUNT] register field) The number of bytes written during the profiling period (MMDCx_MADPSR5[WR_BYTES_COUNT] register field) The number of MMDC clock cycles during which the MMDC state machine is busy (MMDCx_MADPSR1[BUSY_COUNT] register field) BUSY_COUNT is the number of MMDC clock cycles during the profiling period in which the MMDC state machine is not idle. So this is the time the MMDC spends doing any activity, not just read or write data transfers. The MMDC state machine is active whenever there are any read or write requests in the read and write FIFOs. The MMDC is active during many operations that are not reading or writing data such as arbitration of requests, control cycles, bank open/close, etc. So BUSY_COUNT represents the number of cycles when the controller is busy, not just the number of cycles when the external bus is busy. The number of bytes read and bytes written can be used to determine data throughput and the BUSY_COUNT can be used to determine what part of the time the controller is active/idle. Together these can be used to determine the controller efficiency for a particular application. For detailed information, see the "MMDC profiling" section of the MMDC chapter in the reference manual for the SoC being used.

Overview This document introduces how to setup i.MX6Dual/Quad and i.MX6Solo/DualLite Linux software for PCIe compliance test. Software Baselines i.MX6Dual/Quad: Linux BSP L2.6.35_1.0.0 i.MX6Solo/DualLite: Linux BSP L2.6.35_2.0.0 Software Changes To enable PCIe compliance test, PCIe software driver should not turn off PCIe clock and power in the tests. So the following changes are required: diff --git a/arch/arm/mach-mx6/pcie.c b/arch/arm/mach-mx6/pcie.c index 26d26f2..ad71085 100644 --- a/arch/arm/mach-mx6/pcie.c +++ b/arch/arm/mach-mx6/pcie.c @@ -801,6 +801,7 @@ static void __init add_pcie_port(void __iomem *base, void __iomem *dbi_base,      } else {          pr_info("IMX PCIe port: link down!\n"); +#if 0          /* Release the clocks, and disable the power */          pcie_clk = clk_get(NULL, "pcie_clk");          if (IS_ERR(pcie_clk)) @@ -820,6 +821,7 @@ static void __init add_pcie_port(void __iomem *base, void __iomem *dbi_base,          imx_pcie_clrset(IOMUXC_GPR1_TEST_POWERDOWN, 1 << 18,                  IOMUXC_GPR1); +#endif      } } Software Build Integrate the patch to the baseline code and recompile the kernel by following the instructions in Linux BSP user guide. Before recompile, please ensure the following configuration is enabled by selecting " System Type -> Freescale MXC Implementations -> PCI Express support" as "*": # MX6 Options: # CONFIG_IMX_PCIE=y

Hi All, The new Android JB4.2.2_1.0.0-GA release is now available on www.freescale.com ·         Files available Name Description IMX6_JB422_100_ANDROID_DOCS i.MX 6Quad, i.MX 6Dual, and   i.MX 6DualLite Android jb4.2.2_1.0.0 BSP Documentation. Includes Release   Notes, User's Guide, QSG and FAQ Sheet. IMX6_JB422_100_ANDROID_SOURCE i.MX 6Quad, i.MX 6Dual, and   i.MX 6DualLite Android jb4.2.2_1.0.0 BSP, Documentation and Source Code for   BSP and Codecs. IMX6_JB422_100_ANDROID_DEMO i.MX 6Quad, i.MX 6Dual, and   i.MX 6DualLite Android jb4.2.2_1.0.0 BSP Binary Demo Files ·         Target HW boards o   i.MX6DL  SABRE SD board o   i.MX6Q  SABRE SD board o   i.MX6DQ SABRE AI board o   i.MX6DL SABRE AI board ·         Release Description i.MX Android jb4.2.2_1.0.0-ga is GA release for Android 4.2.2 Jelly Bean(JB) on i.MX6Q SABRE SD, i.MX6DL SABRE SD and i.MX6Q/DL SABRE AI platform with key features integrated. i.MX Android jb4.2.2_1.0.0-ga release includes all necessary codes, documents and tools to assist users in building and running Android 4.2.2 on i.MX6Q and i.MX6DL hardware board from the scratch. The prebuilt images are also included for a quick trial on Freescale i.MX6Q, i.MX6DL SABRE SD and i.MX6Q/DL SABRE AI boards. Most of deliveries in this release are provided in source code with the exception of some proprietary modules/libraries from third parties. ·         Features Feature i.MX6Q   SABRE SD i.MX6DL   SABRE SD i.MX6   SABRE AI Comments Linux 3.0.35  kernel Y Y Y Based on Linux BSP   L3.0.35_4.0.0 GA release Google JellyBean   4.2.2 release Y Y Y Based on   android-4.2.2_r1 release Bootup with Android Y Y Y Boot source eMMC& External SD eMMC& External SD SD&Nand Default Nand chip   been support is Micron MT29F8G08ABABAWP Splash Screen for   LVDS Y Y N UI (input) Multi-touch on LVDS   panel Multi-touch on LVDS panel Multi-touch on LVDS   panel UI (display) LVDS panel, HDMI   display LVDS panel, HDMI   display LVDS panel, HDMI   display UI (dual display,   LVDS+HDMI, UI mirror displayed on second device) Y Y Y UI (brightness   control) Y Y Y UI (LiveWallpaper) Y Y Y Storage - External   Media Y Y Y SD, External SD and   UDisk Storage - MTP   (Media Transfer Protocol) Y Y Y Connectivity -   Ethernet Y Y Y Connectivity - BT     Y Y     N Hardware: ·           Atheros AR3001 ·           Atheros AR3002 Profiles: ·           A2DP ·           HID ·           OPP ·           PBAP Connectivity - WiFi Y Y     Y Hardware: ·           Atheros AR6103 SDIO card Features: ·           AP mode ·           Wake on Wireless Connectivity -   3G Y Y   N Hardware: ·           HUAWEI EM770W modem ·           Infinion Amazon 1 modem ·           ZTE FM210 modem Connectivity -   GPS Y Y N Connectivity - USB Tethering Y Y Y Support WIFI and   Ethernet as upstream Internet - SIP   voice call N N N Internet - VPN Y Y Y Power - Battery   status report Y Y N/A Known limitations   about the accuracy in some use cases Power - CPU Freq Y Y Y Power - Bus Freq Y Y Y Media - Music Play Y Y Y Media - Sound Record Y Y Y Media - Video Play Y Y Y Media - Camera Y Y N Media - TVIN N/A N/A Y PAL/NTSC Media - Dual Camera Y Y Y Hardware for SABRE SD: ·           Front Camera: OV5642 CSI camera ·           Rear Camera: OV5640 MIPI camera Hardware   for SABRE AI: ·           Front Camera: UVC camera ·           Rear Camera: TV IN Media - Camcorder Y Y N Media - USB Camera Y Y Y Logitech: ·           C250 ·           E3500 Media - USB Micro Y Y Y Media - Movie   Studio Y Y Y Media - HDMI audio output Y Y Y Graphic - HW 3D   acceleration Y Y Y OpenGLES 1.1/2.0   via GC2000 or GC800 3D core Graphic - HW   accelerated UI surface composition Y Y Y Misc - ADB over USB Y Y Y Misc - Fastboot   utility Y Y Y Misc - SW update   and factory reset Y Y Y Sensor - Magmatic Y Y N Sensor -   Accelerometer Y Y N Sensor - Light Y Y N NTFS-3G File System Y Y Y For external   Storage NAND N N Y Tested NAND chip: - Micro 29F8G08ABABA ·         Change List The below section lists the big changes in JellyBean which need the user’s attention when comparing to Freescale ICS version: o   Default Android multiple display implementation in JellyBean o   Display resolution change in Setting is not been supported o   New camera hal implementation based on JellyBean libcamera2 o   Add NTFS file system support for external storage ·         Known issues For known issues and limitations please consult the release notes

Hi All, The i.MX6 Android R13.4-GA.03 patch release is now available on www.freescale.com ·         Files available # Name Description 1 IMX6_R13.4.03_ANDROID_PATCH This patch release is based on the i.MX 6 Android R13.4   release. The purpose of this patch release is correct the PFD workflow in   U-Boot, fix the miscalibration issue for the thermal sensor and corrects   ramp-up time of the internal LDOs

Hi All, The i.MX6 Android R13.4.1.04 patch release is now available onwww.freescale.com ·         Files available # Name Description 1 IMX6_R13.4.1.04_ANDROID_PATCH This patch release is based on the i.MX 6 Android R13.4.1   release. The purpose of this patch release is correct the PFD workflow in   U-Boot, fix the miscalibration issue for the thermal sensor and corrects   ramp-up time of the internal LDOs

The i.MX6 DL/S L3.035_3.0.4 patch release is now available onwww.freescale.com ·         Files available # Name Description 1 L3.0.35_3.0.4_TEMP_PATCH This patch release is based on the i.MX 6DualLite/6Solo   Linux L3.0.35_3.0.0 release. The purpose of this patch release is fix the   miscalibration issue for the thermal sensor.

This is the prototype demo to enable surround view demo on SabreSD.   The attached Files are HW&SW guides and demo video. Updating Notes: Add miniPCIE Surround View_Rev A design file (include schematic and layout) as attachement. Add Gerber file   i.MX6Q Surround view patch https://community.freescale.com/docs/DOC-95143 Original Attachment has been moved to: Gerber-file.zip Original Attachment has been moved to: miniPCIe-Surround-View_Rev-A.zip

This is the prototype solution to enable second display showing different things on JB4.2.2 SabreSD. Make use of Class Presentation provided by android to be embedded into Status bar. When unlock the screen, the Presentation will show on second display. Now, the solution requires one .mp4 video placed in root sdcard. Of course, you may change it to show anything. The attached Files are a layout xml file, a patch and a recorded video. The layout file should be put into android/frameworks/base/packages/SystemUI/res/layout/ folder. The patch should be applied to frameworks/base.git. The recorded video shows the dual display demo as a reference.

The i.MX 6 Android 13.4.1.03 patch release is now available on www.freescale.com IMX6_R13.4103_ANDROID_LDO_PATCH This patch release is based on the i.MX6 Android R13.4.1 release. The purpose of this patch release is to manage the LDO and PMIC ramp-up time correctly.

These questions and answers are about interrupt generation at a dedicated (configurable) video output port. The i.MX6D manual (Rev. 0) Image Processing Unit (IPU) chapter mentions: Every DI has 10 timing generator counters. The IPU Interrupt Generator has 10 DI0 counters (1...10) and just 2 DI1 counters (3 & 😎 as interrupt sources. The Interrupt Control Register lists 11 DI0 counters (0...10) Q1. Are the DI timing-generator counters linked to the counters in the interrupt controller, or are they different counters? A1. Yes, the DI timing generator counters are linked to the counters in the interrupt controller. Q2. Why are there 11 counters listed in the interrupt controller, but just 10 counters in the timing generator? A2. There is disp_clk_en_pre in the interrupt controller. Thus the 11 counters: 10 timing generator counters and 1 disp clock generator counter. Q3. Is configurable timing feasible for DI0 by using the timing generator counters? A3. Yes, using the 10 internal timing counters you can generate various timing relationships. In addition, you can detect any of the interrupt counters. For example, if you use counter 8, then you can detect the interrupt associated with counter 8. Q4. Explain the impact of the DI1 counter access of only channels 3 and 8. A4. DI1 also has 10 timing generator counters and 1 disp clock generator counter, which you can use to generate desired waveforms. This is similar to DI0. The difference is only 2 of the 10 counters (plus another disp_clk) are connected to the interrupt controller for DI1. Therefore, there is a restriction for detection. If you use counter 7, read out the counter 7 interrupt of DI1 is not possible. However, 2 channels should be sufficient. These interrupts are usually used to indicate a frame start or a frame end. We usually use counter 3 to represent Vsync. So normally we only use counter 3 interrupt. DI1 has only 3 accesses because this covers the anticipated use case and the desire was to restrict register size. The extra counters facilitate flexible DI1 timing generation.