i.MX8MM/8MP PCIE eye fine-tuning regs

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i.MX8MM/8MP PCIE eye fine-tuning regs

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i.MX8MM/8MP PCIE eye fine-tuning regs

PCIE IP on i.MX8MM and i.MX8MP is same, customer can follow PCIE test Application note to do compliance test, if eye diagram failed, they can fine turn corresponding regs below:

iMX8MMRM.pdf

IMX8MPRM.pdf

GEN1:

Lambert_0-1671368933859.png

 

Lambert_1-1671368933876.png

 

 

Lambert_2-1671368933881.png

 

Lambert_3-1671368933900.png

 

 

GEN2:

Lambert_4-1671368933905.png

 

Lambert_5-1671368933910.png

 

 

Lambert_6-1671368933914.png

 

Lambert_7-1671368933922.png

 

 

 

 

Related code in kernel

Phy-fsl-imx8-pcie.c (kernel-source\drivers\phy\freescale)    3794      2020/11/4

static int imx8_pcie_phy_init(struct phy *phy)

{

……

 

       /* Configure TX drive level  */

       writel(0x2d, imx8_phy->base + 0x404);

 

       return 0;

}

 

Thanks

Lambert

Version history
Revision #:
1 of 1
Last update:
‎12-18-2022 06:10 AM
Updated by: