i.MX6SL LPDDR2 Register Programming Aid

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i.MX6SL LPDDR2 Register Programming Aid

i.MX6SL LPDDR2 Register Programming Aid

This is a detailed programming aid for the registers associated with MMDC initialization. The last sheet formats the register settings for use with ARM RealView ICE. It can also be used with the windows executable for the DDR Stress Test. This programming aid was used for internal Freescale validation boards.

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Hi,Mark

     We're using a 2GB lpddr2 on our custom board and I use this tool to generate the dcd settings to run the ddr stress tester. But it come out with below message. Could you give a guidence what's wrong with this?

loop: 1

DDR Freq: 396 MHz

t0.1: data is addr test

Address of failure: 0x80000000

Data was: 0xa0000000

But pattern  should match address

The component we're using is H9TP17ABLDMCNR which is an emcp. Below is the block diagram of ddr part.

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here is what I filled in the table.

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Register MMDC_MAARCR is not normally programmed by the initialization script. Freescale recommends leaving it with default values.

This is an advisory to customers who decide to change some of the fields in this register.

A bug has been found with the ARCR_GUARD field. It should always be left programmed to the default 0x0 value. If programmed to a different value, the behavior is unpredictable.

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Last update:
‎06-24-2015 10:16 PM
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