i.MX 8M Family DDR Tool Release

[#1]

Important: If you have any questions or would like to report any issues with the DDR tools or 
supporting documents please create a support ticket in the  i.MX community. Please note that any 
private messages or direct emails are not monitored and will not receive a response.

NOTE: Please note that DDR support for the i.MX 8M Family and has also been added in the 
Config Tools for i.MX Applications Processors | NXP Semiconductors
Please consider using this tool with more enhanced features.

i.MX 8M Family DDR Tools Overview

The i.MX 8M Family DDR Tool is a Windows-based software to help users to do LPDDR4/DDR4/DDR3L training, stress test and DDR initial code generation for u-boot SPL. This page contains the latest releases for the i.MX 8M Family DDR Tools and cover the following SoCs :

• i.MX 8M Quad and its derivatives i.MX 8M Quadlite and i.MX 8M Dual
• i.MX 8M Mini Quad and its derivatives i.MX 8M Mini Quadlite/Dual/DualLite/Solo/SoloLite 
• i.MX 8M Nano Quad and its derivatives i.MX 8M Nano Quadlite/Dual/DualLite/Solo/SoloLite 
• i.MX 8M Plus

NOTE: For the i.MX 8/8X Family of DDR tools please refer to the:
i.MX 8/8X Family DDR Tools Release  

The purpose of the i.MX 8M Family DDR Tools is to enable users to generate and test a custom DRAM initialization based on their device configuration (density, number of chip selects, etc.) and board layout (data bus bit swizzling, etc.).  This process equips the user to then proceed with the bring-up of a boot loader and an OS.  Once the OS is brought up, it is recommended to run an OS-based memory test (like Linux memtester) to further verify and test the DDR memory interface.  

The i.MX 8M Family DDR Tools consist of:

• DDR Register Programming Aid (RPA)
• MSCALE DDR Tool

For more details regarding these DDR tools and their usage, refer to the i.MX 8M DDR Tools User Guide.

i.MX 8M Family DDR Tool 

The i.MX 8M Family DDR stress test tool is a Windows-based software tool that is used as a mechanism to verify that the DDR initialization is operational for use with u-boot and OS bring-up. To install the DDR Stress Test, save and extract the zip file mscale_ddr_tool_vXXX_setup.exe.zip   (where 'xxx' is the current version number) and follow the on-screen installation instructions.

i.MX 8M Family DDR Tool Requirements

• The tool requires access to the Windows registry, hence users must run it in administrator mode.
• When users design new i.MX 8M Family boards, please make sure to follow the rules outlined in the respective Hardware Developers Guide and the MSCALE_DDR_Tool_User_Guide, which can help users bring up DDR devices on their respective i.MX 8M boards.

i.MX 8M Family DDR Tool User Guide

The i.MX 8M DDR tool includes the document: MSCALE_DDR_Tool_User_Guide

NOTE: Please read the MSCALE_DDR_Tool_User_Guide inside the package carefully before you 
use this tool. 

i.MX8M DDR Tool Revision History

Rev	Major Changes* (Features)	Comments
3.31	Integration of the workaround for 8MQ ERR051273
3.30	Fix DBI enabled issue for all i.MX 8M series Automatically identify ROHM and PCA9450 PMICs on i.MX 8M Nano board Fix 4GB/8GB memory tester issues
3.20	Add support to i.MX 8M Plus
3.10	Fixe UART communication issues for some specific characters between the PC software and the target board. Fine-tune DDRPHY registers in generated C code.
3.00	Add support to i.MX8M-nano Add support to different PMIC or PMIC configuration Add support to stress test for all DDR frequency points RPA tools for Nano include support for DDR3L, DDR4, and LPDDR4.	Note that the DDR3L and LPDDR4 RPAs contain the name preliminary only to denote that these RPAs are based on internal NXP validation boards where the DDR4 RPA is based on the released EVK.
2.10	Change DDR4 capacity computing method
2.00	Add support to i.MX8M-mini

* Further details available in the release notes

Sample configuration in the .ds script for i.MX 8M debug UART2:

################step 0: configure debug uart port. Assumes use of UART IO Pads.   #####
##### If using non-UART pads (i.e. using other pads to mux out the UART signals), #####
##### then it is up to the user to overwrite the following IO register settings   #####
memory set	0x3033023C	32	0x00000000	#IOMUXC_SW_MUX_UART2_RXD
memory set	0x30330240	32	0x00000000	#IOMUXC_SW_MUX_UART2_TXD
memory set	0x303304A4	32	0x0000000E	#IOMUXC_SW_PAD_UART2_RXD
memory set	0x303304A8	32	0x0000000E	#IOMUXC_SW_PAD_UART2_TXD
memory set	0x303304FC	32	0x00000000	#IOMUXC_SW_MUX_UART2_SEL_RXD
sysparam set	debug_uart		1	#UART index from 0 ('0' = UART1, '1' = UART2, '2' = UART3, '3' = UART4)

Sample configuration in the front of the .ds script for i.MX 8M debug UART3 

################step 0: configure debug uart port. Assumes use of UART IO Pads.   #####
##### If using non-UART pads (i.e. using other pads to mux out the UART signals), #####
##### then it is up to the user to overwrite the following IO register settings   #####
memory set	0x30330244	32	0x00000000	#IOMUXC_SW_MUX_UART3_RXD
memory set	0x30330248	32	0x00000000	#IOMUXC_SW_MUX_UART3_TXD
memory set	0x303304AC	32	0x0000000E	#IOMUXC_SW_PAD_UART3_RXD
memory set	0x303304B0	32	0x0000000E	#IOMUXC_SW_PAD_UART3_TXD
memory set	0x30330504	32	0x00000002	#IOMUXC_SW_MUX_UART3_SEL_RXD
sysparam set	debug_uart		2	#UART index from 0 ('0' = UART1, '1' = UART2, '2' = UART3, '3' = UART4)

Sample configuration in the front of the .ds script for i.MX 8M Mini PMIC configuration:

##############step 0.5: configure I2C port IO pads according to your PCB design.   #####

########### You can modify the following instructions to adapt to your board PMIC #######

memory set	0x30330214	32	0x00000010	#IOMUXC_SW_MUX_I2C1_SCL
memory set	0x30330218	32	0x00000010	#IOMUXC_SW_MUX_I2C1_SDA
memory set	0x3033047C	32	0x000000C6	#IOMUXC_SW_PAD_I2C1_SCL
memory set	0x30330480	32	0x000000C6	#IOMUXC_SW_PAD_I2C1_SDA
sysparam set	pmic_cfg	0x004B	#bit[7:0] = PMIC addr,bit[15:8]=I2C Bus.	Bus index from 0 ('0' = I2C1, '1' = I2C2, '2' = I2C3, '3' = I2C4)
sysparam set	pmic_set	0x2F01	#bit[7:0] = Reg val, bit[15:8]=Reg addr.	#REG(0x2F) = 0x01
sysparam set	pmic_set	0x0C02		#REG(0x0C) = 0x02
sysparam set	pmic_set	0x171E		#REG(0x17) = 0x1E
sysparam set	pmic_set	0x0C00		#REG(0x0C) = 0x00
sysparam set	pmic_set	0x2F11		#REG(0x2F)=0x11

i.MX 8M Family DDR Register Programming Aid (RPA)

The i.MX 8M DDR RPA (or simply RPA) is an Excel spreadsheet tool used to develop DDR initialization for a user’s specific DDR configuration (DDR device type, density, etc.). The RPA generates the DDR initialization(in a separate Excel worksheet tab):

• DDR Stress Test Script: This format is used specifically with the DDR stress test by first copying the contents in this worksheet tab and then pasting it to a text file, naming the document with the “.ds” file extension. The user will select this file when executing the DDR stress test.
• The How to Use Excel worksheet tab provides instructions on using the RPA

i.MX 8M Family DDR Register Programming Aid (RPA): Current Versions

To obtain the latest RPAs, please refer to the following links (note, existing RPAs have been removed from this main page and moved to the SoC specific links below):

i.MX 8M Quad :

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8M-m850D-DDR-Register-Programming-Ai...

i.MX 8M Mini :

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MMini-m845S-DDR-Register-Programmin...

i.MX 8M Nano:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8MNano-m815S-DDR-Register-Programmin...

i.MX 8M Plus:

https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8MPlus-m865S-DDR-Register-Programmi...

Processor	Mask Revisions	Memory Supported	Latest RPA Version *
i.MX 8M Quad & Derivatives	All	LPDDR4	Rev 33
i.MX 8M Quad & Derivatives	All	DDR4	Rev 18
i.MX 8M Quad & Derivatives	All	DDR3L	Rev 9
i.MX 8M Mini & Derivatives	A0	LPDDR4	Rev 22
i.MX 8M Mini & Derivatives	A0	DDR4	Rev 21
i.MX 8M Mini & Derivatives	A0	DDR3L	Rev 10
i.MX 8M Nano & Derivatives	A0	LPDDR4	Rev 9
i.MX 8M Nano & Derivatives	A0	DDR4	Rev 12
i.MX 8M Nano & Derivatives	A0	DDR3L	Rev 6
i.MX 8M Plus & Derivatives	A1	LPDDR4	Rev 9
i.MX 8M Plus & Derivatives	A1	DDR4	Rev 9

* For the details about the updates, please refer to the Revision History tab of the respective RPA. 

To modify the DRAM Frequency for a custom setting refer to iMX 8M Mini Register Programming Aid DRAM PLL setting 

Related Resources Links:

• Config Tools for i.MX Applications Processors | NXP Semiconductors
• i.MX 8M Mini Register Programming Aid DRAM PLL setting 
• i.MX 8/8X Series DDR Tool Release 
• i.MX 6/7 DDR Stress test GUI Tool
• i.MX 8M Application Processor Related Resources
• i.MX8M (m850D) DDR Register Programming Aid (RPA) 
• i.MX8MMini (m845S) DDR Register Programming Aid (RPA) 
• i.MX8MNano (m815S) DDR Register Programming Aid (RPA)
• i.MX 8MPlus (m865S) DDR Register Programming Aids (RPA)  
• i.MX 8ULP DDR tools: i.MX Software and Development Tools | NXP Semiconductors

  • Scroll down to “Other Resources --> Tools --> DDR Tools”

[gabriel_h]

Great. Thank You