Setting up the clocks for PCIe is a bit tricky, especially for bare-metal or if not using the Linux BSP.
The ENET PLL (PLL6) 100 MHz (SATA) PFD output MUST be enabled in order to access the registers in the PCIe IP block.
(To enable this clock, set CCM_ANALOG_PLL_ENET[ENABLE_100M (bit 20)].)
This is not well documented in the RM, but follow these steps to insure reliable performance.
This is the very tips that I've been looking for, so it would be helpful if you give me some advice about iMX6 PCIe configuration.
Now I'm trying to use PCIe of IMX6 as RC with the external reference clock at 100MHz of spread-spectrum on my custom board, which fails to link up to EP gen2 device with LTSSM is 0, 1 or 2.
I'd like to ask if there are any other tricks and traps for iMX6 PCIe configuration as RC on the non-Linux BSP environment.
My configuration summary is:
-- ENET_PLL is set bypassed with proper clock source, enable_output, enable_100mhz (in clock.c).
-- PCIe_PHY multiplication is set as x25 before LTSSM is enabled (in pcie.c).
Thank you very much for your attention in advance.
Sir I didn't get any document here.Actually I need clear steps to set i.mx6 PCIe clock, Anyone can please help me which are all register I need to modify to generate the clock for PCIe .
Are you running under Linux or bare metal?
If you're running bare-metal, I would examine the Linux PCIe driver source code for setting up the PCIe clocks.
Also, be sure you have the hardware set up correctly. Note the use of coupling capacitors and termination resistors on the iMX6 Sabre Platform.
I am running bare-metal.
1.I need steps (which register I need to modify ) to set PCIe clock.
2.Yes sir You can attach PCIe driver source code.
Hii Bradley Stewart sir..,
I am running in bare-metal...,