This patch made the display no interrupt from uboot to kernel to Android. The IPU and related hardware display interface will only be initialized once in Uboot, the kernel code will skip the IPU initialization.
1. Description
1) Support HDMI, LVDS and LCD output in UBoot.
2) Support UBoot logo keep from uboot to kernel to Android.
3) For HDMI, both 720P and 1080P mode were supported.
4) For LVDS, 1024x768 and 1080P dual channel panels were supported.
5) The logo file is a 32 bpp bmp file.
2. File List
-- kernel_imx\0001-Keep-uboot-logo-for-Android-boot-supports-HDMI-LCD-a.patch
-- kernel_imx\0002-Bug-fix-for-uboot-logo-keep-patch.patch
Kernel patch to support the logo keep feature.
-- uboot-imx\0001-Enable-uboot-logo-for-HDMI-LCD-and-LVDS.patch
Uboot patch to support the logo display.
-- logo.bmp
Example 32bpp logo file.
-- readme.txt
this file, please refer to it before use the patches
3. Requirement
- iMX6 SabreSD board.
- Android JB4.2.2_1.1.0-GA UBoot and kernel.
4. How to use
-- Copy the two patch files to Android kernel_imx and uboot-imx folder and apply them.
$ cd ~/myandroid/kernel_imx/
$ git apply ./0001-Keep-uboot-logo-for-Android-boot-supports-HDMI-LCD-a.patch
$ cd ~/myandroid/bootable/bootloader/uboot-imx/
$ git apply ./0001-Enable-uboot-logo-for-HDMI-LCD-and-LVDS.patch
$ git apply ./0002-Bug-fix-for-uboot-logo-keep-patch.patch
-- Build the new uboot image:
$ cd ~/myandroid/bootable/bootloader/uboot-imx
$ export CROSS_COMPILE=~/myandroid/prebuilt/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
$ export ARCH=arm
$ make mx6q_sabresd_android_config
$ make
-- Before build new UBoot image, the display type can be selected from file uboot-imx\include\configs\mx6q_sabresd.h
// Select one of the output mode
#define IPU_OUTPUT_MODE_HDMI
//#define IPU_OUTPUT_MODE_LVDS
//#define IPU_OUTPUT_MODE_LCD
-- Build the new kernel image:
$ cd ~/myandroid/kernel_imx
$ export CROSS_COMPILE=~/myandroid/prebuilt/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi-
$ export ARCH=arm
$ make imx6_android_defconfig
$ make uImage
-- Before "make uImage", make menuconfig can be used to select the display type.
System Type --->
Freescale MXC Implementations --->
MX6 clk setting for smooth UI transtion from bootloader to kernel --->
Select Display Interface
( ) Smooth UI transtion on LCD, IPU1, DI0
( ) Smooth UI transtion on LVDS, IPU1, DI1
(X) Smooth UI transtion on HDMI, IPU2, DI0
-- Uboot parameters for video mode
1080P HDMI:
"video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 fb0base=0x27b00000 fbmem=28M hdmi_audio_clk=148500000"
720P HDMI:
"video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 fb0base=0x27b00000 fbmem=28M hdmi_audio_clk=74250000"
1024x768 LVDS:
"video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666,bpp=32 fb0base=0x27b00000 fbmem=28M"
800x480 LCD:
"video=mxcfb0:dev=lcd,CLAA-WVGA,if=RGB565,bpp=32 fb0base=0x27b00000 fbmem=28M"
-- dd the logo.bmp to SD card address 0x100000 and skip the 54 bytes bmp file header.
sudo dd if=logo.bmp of=/dev/sdc bs=1 seek=1048576 skip=54
5. Note
1) The logo.bmp file should be 32bpp or 16bpp, and it should be synced with video mode parameters "bpp=xx",
and uboot config file mx6q_sabresd.h (#define DISPLAY_BPP xx).
2) The IPU number and DI number are hard coded in kernel file "board-mx6q_sabresd.c".
static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {
.ipu_id = 1,
.disp_id = 0,
};
static struct fsl_mxc_lcd_platform_data lcdif_data = {
.ipu_id = 0,
.disp_id = 0,
.default_ifmt = IPU_PIX_FMT_RGB565,
};
static struct fsl_mxc_ldb_platform_data ldb_data = {
.ipu_id = 0,
.disp_id = 1,
.ext_ref = 1,
.mode = LDB_SEP1,
.sec_ipu_id = 0,
.sec_disp_id = 0,
};
3) The IPU number and DI number are defined by Macro in Uboot file "include\configs\mx6q_sabresd.h"
#define IPU_NUM 2 // 1 for IPU1, 2 for IPU2.
#define DI_NUM 0 // 0 for DI0, 1 for DI1.
4) The display type used in uboot and kernel must be same, same type, same IPU number, same DI port and
same resolution.
[2015-06-29 Update]: JB4.2.2_1.1.0_uboot_logo_keep_patch_2015-06-29.zip
Fix some LVDS issues for iMX6DL.
Also given an example for LVDS0 with DI0.
New Uboot patches:
0002-Updated-lvds-clock-source-to-pll2_pfd0.-Same-as-kern.patch
0003-Add-support-for-iMX6DL.patch
New kernel patches
0003-Skip-lvds-re-initialization-for-logo-keep.patch
0004-Add-examlpe-for-LVDS0-logo-keep.patch
[2015-08-07 Update]: JB4.2.2_1.1.0_uboot_logo_keep_patch_2015-08-07.zip
Added the new Uboot patch 0004-Correct-the-sequence-to-set-LDB-clock.patch
It can correct the LVDS clock set sequence whch is a known issue that caused no LVDS display sometimes.
[2015-09-18 Update]: JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18.zip
Added the patch for Android JB4.3_GA1.1.1 release.
Updated clock usecount, after blank the display, the related clock can be gated off correctly.
Support LVDS clock from PLL5.
[2015-12-21 Update]: Added 3.10.53_GA1.1.0 patch: L3.10.53_GA1.1.0_uboot_logo_keep_patch_2015-12-21.zip.
Verified on iMX6DL/Q SabreSD board. It supports LCD and LVDS panels, HDMI patch will be released later.
[2016-01-04 Update]: Added 3.10.53_GA1.1.0 patch: L3.10.53_GA1.1.0_uboot_logo_keep_patch_2016-01-04.zip.
Added HDMI display support. Now it supports LCD, LVDS and HDMI displays.
Fixed the video playback issue for boot up.
[2016-05-18 Update]: 0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch
An issue was founded, when dual channel 4 lanes LVDS panel was used, in uboot there will be no LVDS TX3 signa on one LVDS port, the attach "0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch" was used to fix this issue, it is based on JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18.zip, for other BSP, please port it manually.
[2016-08-29 Update]: 0001-After-reset-IPU-in-SRC-Control-Register-wait-for-res.patch
On some iMX6 chip, after reset the IPU in SRC Control Register, enable IPU at once will cause system hang up, to avoid such issue, software needs wait for IPU reset done by polling the SRC register.
The attach "0001-After-reset-IPU-in-SRC-Control-Register-wait-for-res.patch" was used to fix this issue, it is based on JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18.zip + "0001-Fix-the-split-mode-LVDS-panel-no-TX3-signal-issue.patch", for other BSP, please port it manually.
[2017-01-06 Update] Added patch for L4.1.15_GA1.2.0 BSP and Android M6.0.1_GA2.1.0 BSP.
Files: L4.1.15_GA1.2.0_uboot_logo_keep_patch_2017-01-06.zip; M6.0.1_2.1.0_uboot_logo_keep_patch_2017-01-06.zip
Hi Qiang,
1.I supplyed the patch, but it didn't work, the screen is white, only the backlight(I use dual channel split mode of LVDS 1920x1080 ).
#ifdef CONFIG_UBOOT_LOGO_ENABLE
// Select one of the output mode
// #define IPU_OUTPUT_MODE_HDMI
#define IPU_OUTPUT_MODE_LVDS
// #define IPU_OUTPUT_MODE_LCD
// For LVDS, 1920*1080 resolution, dual channel
#define DISPLAY_WIDTH 1920
#define DISPLAY_HEIGHT 1080
#define DISPLAY_BPP 32
#define DISPLAY_IF_BPP 24 // RGB24 interface
#define DISPLAY_HSYNC_START 100
#define DISPLAY_HSYNC_END 40
#define DISPLAY_HSYNC_WIDTH 10
#define DISPLAY_VSYNC_START 20
#define DISPLAY_VSYNC_END 3
#define DISPLAY_VSYNC_WIDTH 2
#define DISPLAY_PIX_CLOCK 135000000 //(DISPLAY_HSYNC_START + DISPLAY_HSYNC_END + DISPLAY_HSYNC_WIDTH + DISPLAY_WIDTH) * (DISPLAY_VSYNC_START + DISPLAY_VSYNC_END + DISPLAY_VSYNC_WIDTH + DISPLAY_HEIGHT) * refresh rate (60Hz)
#define LVDS_SPLIT_MODE // For dual channel split mode.
#define DISPLAY_VSYNC_POLARITY 1
#define DISPLAY_HSYNC_POLARITY 1
#define DISPLAY_CLOCK_POLARITY 1
#define DISPLAY_DATA_POLARITY 0
#define DISPLAY_DATA_ENABLE_POLARITY 1
#define IPU_NUM 1 // 1 for IPU1, 2 for IPU2.
#define DI_NUM 1 // 0 for DI0, 1 for DI1.
#define LVDS_PORT 1 // 0 for LVDS0, 1 for LVDS1.
#define DI_CLOCK_EXTERNAL_MODE
2.The data signal of LVDS is not normal.
3.uboot log:
U-Boot 2009.08-dirty ( 5月 29 2014 - 18:44:23)
CPU: Freescale i.MX6 family TO1.2 at 792 MHz
Thermal sensor with ratio = 177
Temperature: 65 C, calibration data 0x5614c669
mx6q pll1: 792MHz
mx6q pll2: 528MHz
mx6q pll3: 480MHz
mx6q pll8: 50MHz
ipg clock : 66000000Hz
ipg per clock : 66000000Hz
uart clock : 80000000Hz
cspi clock : 60000000Hz
ahb clock : 132000000Hz
axi clock : 264000000Hz
emi_slow clock: 132000000Hz
ddr clock : 528000000Hz
usdhc1 clock : 198000000Hz
usdhc2 clock : 198000000Hz
usdhc3 clock : 198000000Hz
usdhc4 clock : 198000000Hz
nfc clock : 24000000Hz
Board: i.MX6Q-SABRESD: unknown-board Board: 0x63012 [WDOG ]
Boot Device: MMC
I2C: ready
DRAM: 1 GB
MMC: FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2,FSL_USDHC: 3
*** Warning - bad CRC or MMC, usr: serial
==board_late_init line = 2261==
==setup_lvds_iomux line = 2144==
==ipu_display_setup line = 2696 IPU_NUM = 1 DI_NUM = 1 ==
==ipu_setup line = 2415==
==ipu_setup line = 2424 reg = 0x3ff00000==
==clk_config line = 1054==
config_ipu_lvds_clk: freq = 472500000.
config_ipu_lvds_clk: set pll3_pfd1 clock to 468MHz, divider = 18.
==setup_lvds line = 2608==
Net: got MAC address from IIM: 00:00:00:00y to stop autoboot: 0
Best Regards
Brague
Hi Brague, the split mode LVDS timing parameters are for ChiMei M216H1-L01 panel, for your own panel, you need update them based on the datasheet of your LVDS panel.
I think you need measure the hardware signals, such as LCD power, backlight, and so on.
Hi Qiang,
On my board I use 800x480 RGB LCD and the video parameters for kernel is:
"video=mxcfb0:dev=lcd,CLAA-WVGA,if=RGB24,bpp=32 fb0base=0x27b00000 fbmem=28M"
With this configuration the display works perfect in Android, but in uboot the logo is not correct. I checked the patch and found for LCD mode we have definition:
#define DISPLAY_IF_BPP 16 // RGB565 interface
So I changed the definition as follows and rebuilt uboot, but the problem is still there.
#define DISPLAY_IF_BPP 24 // RGB24 interface
I hard-coded the uboot code (by setting bmpReady to 0 in board/freescale/mx6q_sabresd/mx6q_sabresd.c) to display red,green and blue color bar, but the color is not correct as the following picture.
If you have any advice on it please let me know. Thanks!
Hi Frank, you should check the function ipu_iomux_config() in mx6q_sabresd.c, whether the 24 display data pins are set correctly?
Hi Qiang,
After checking the pixel color carefully, I found the pixel color was reversed when displayed in uboot. For example, if the pixel data in display buffer is Red (0xFF0000), the acutal display result is 0x00FFFF (Green + Blue). However after kernel and Android boots up (with logo smooth transition feature), the color becomes correct!
I did a test by changing
#define DISPLAY_DATA_POLARITY 0
to
#define DISPLAY_DATA_POLARITY 1
After this change the color in uboot looks correct but it is reversed after kernel and Android boots up. However the color in Android will be correct after the system wakes up from sleep. I guess there is IPU re-initialization during wakeup.
Perhaps I can workaround this issue by reversing pixel data in uboot display buffer before it is displayed, but don't know why there is such issue.
I also checked ipu_iomux_config() and it looks no problem.
Please note in my case DISPLAY_IF_BPP is set to 24. If DISPLAY_IF_BPP is set to 16, the color in either uboot or Android is incorrect unless the system wakes up from sleep.
The POLARITY of VSYNC, HSYNC, Pixel clock, data, DE depend on your panel's datasheet.
You should double check them and the same setting should be used in kernel and Uboot. Your issue is more like pixel clock polarity issue.
Hi Qiang,
Thanks for your reply! I will check if it's polarity issue. For now the puzzle for me is that why uboot and Android have different results while the smooth transition feature is enabled (uboot and kernel should have the same IPU configuration?).
The video mode setting for UBoot and kernel should be same, and all these parameters should be from panel's datasheet. I haven't checked the LVDS and LCD panel polarity, maybe they are not aligned in default code, the followed is the align method for Uboot and kernel:
Uboot Kernel
"#define DISPLAY_VSYNC_POLARITY 1" = "FB_SYNC_VERT_HIGH_ACT"
"#define DISPLAY_HSYNC_POLARITY 1" = "FB_SYNC_HOR_HIGH_ACT"
"#define DISPLAY_CLOCK_POLARITY 1" = "FB_SYNC_CLK_LAT_FALL"
"#define DISPLAY_DATA_POLARITY 1" = "FB_SYNC_DATA_INVERT"
"#define DISPLAY_DATA_ENABLE_POLARITY 0" = "FB_SYNC_OE_LOW_ACT"
Example for HDMI 1080P60 setting:
#define DISPLAY_VSYNC_POLARITY 1
#define DISPLAY_HSYNC_POLARITY 1
#define DISPLAY_CLOCK_POLARITY 0
#define DISPLAY_DATA_POLARITY 0
#define DISPLAY_DATA_ENABLE_POLARITY 1
So in kernel video mode:
{
NULL, 60, 1920, 1080, 6734, 148, 88, 36, 4, 44, 5,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
FB_VMODE_NONINTERLACED, 0,
},
Hi Qiang,
The issue has been resolved by modifying iomux and pad configurations of two pins on my board. However those pins are not IPU-related or LCD panel related. The root cause may hardware or chip specific although I still don't understand it now.
Anyway all the IPU register settings or IPU pad configurations in your patch are correct except that I changed DISPLAY_IF_BPP from 16 to 24 for my case. The patch is perfect! Thanks for your help!
For default Android BSP, for the the LVDS1 signal will stop and re-enable in a short time, the LVDS panel that freescale reference board used can keep the screen in such short signal stop, but for most of other panels, screen will disappear for a short time. This patch was used to fix such issue.
The patch had given three examples for how to enable the logo keep on feature, so if you used different panel on different IPU DI port, you should reference to these example to modify the code.
My environment: imx6dl, JB4.2.2_1.1.0, hdmi, 1920x1080, RGB24
I applied the patch, and test with lcd, it works well.
Now, I am testing with hdmi,
Changes I did as follows,
uboot-imx/include/configs/mx6dl_sabresd.h
1.
370 #define IPU_OUTPUT_MODE_HDMI
371 // #define IPU_OUTPUT_MODE_LVDS
372 // #define IPU_OUTPUT_MODE_LCD
2.
381 #ifdef IPU_OUTPUT_MODE_HDMI
...
421 #define IPU_NUM 1 // original set to 2
I changed IPU_NUM from 2 to 1, because there is only 1 ipu in imx6dl, I think it should be changed
and
if I use #define IPU_NUM 2
the system will halt on uboot, log as follow,
________________________________________
U-Boot 2009.08 ( 6鏈18 2015 - 16:38:27)
CPU: Freescale i.MX6 family TO1.2 at 792 MHz
Thermal sensor with ratio = 190
Temperature: 30 C, calibration data 0x5b251d69
mx6q pll1: 792MHz
mx6q pll2: 528MHz
mx6q pll3: 480MHz
mx6q pll8: 50MHz
ipg clock : 66000000Hz
ipg per clock : 66000000Hz
uart clock : 80000000Hz
cspi clock : 60000000Hz
ahb clock : 132000000Hz
axi clock : 198000000Hz
emi_slow clock: 99000000Hz
ddr clock : 396000000Hz
usdhc1 clock : 198000000Hz
usdhc2 clock : 198000000Hz
usdhc3 clock : 198000000Hz
usdhc4 clock : 198000000Hz
nfc clock : 24000000Hz
Board: i.MX6DL/Solo-SABRESD: unknown-board Board: 0x61012 [POR ]
Boot Device: MMC
I2C: ready
DRAM: 1 GB
MMC: FSL_USDHC: 0,FSL_USDHC: 1,FSL_USDHC: 2,FSL_USDHC: 3
*** Warning - bad CRC or MMC, using default environment
In: serial
Out: serial
Err: serial
$$$$, mmc_dev=3
$$$$size=8294400,mmc->read_bl_len=512
$$$$start=32768,count=16200,CONFIG_FB_BASE=27b00000
config_ipu_di_clk: freq = 148500000.
wait for pll5 lock.
config_ipu_di_clk: set pll5 clock to 297000000Hz.
_____________________________________________
else if I use #define IPU_NUM 1
the system will start up, but on hdmi, it shows "no siginal input"
3. my KERNEL_CMDLINE is as follows:
BOARD_KERNEL_CMDLINE := console=ttymxc0,115200 androidboot.console=ttymxc0 vmalloc=400M init=/init video=mxcfb0:dev=hdmi,1920x1080M@60,bpp=32 video=mxcfb1:off video=mxcfb2:off fbmem=28 androidboot.hardware=freescale
Do you know what is the problem with my case?
Thanks
现在打了这个patch。 uboot下面正常显示了,
但进入内核后出现错误:
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: timeout when waiting for flip irq
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
mxc_sdc_fb mxc_sdc_fb.0: MXCFB_WAIT_FOR_VSYNC: timeout 0
The LVDS0 example had been given, please use followed setting in Uboot file include/configs/mx6dl_sabresd.h, both DI_NUM and LVDS_PORT should be 0.
#define DI_NUM 0 // 0 for DI0, 1 for DI1.
#define LVDS_PORT 0 // 0 for LVDS0, 1 for LVDS1.
Hi,
Would be possible to get this patch updated to u-boot 2014.04 or the last 2015.04 ? I'm using your yocto 3.10.53 recipes and the uboot generated is 2014.04. I think the kernel is ok, because your patch is for linux-3.0.35, the same used in yocto 3.10.53
Thanks!
I applied the patch on uboot for Android 4.4.2 sucessfully. I believe it is OK for other versions including pure linux. But you may need to review the patch and your uboot/linux code carefully to check if there are conflicts between different versions that the patch is based on and the one you worked on. Also you may need to remove conflicts manually.
Hi, Qiang_FSL !
Please, can you help me to turn this feature on for linux 3.14?
I can't apply this patch, but I see 'late_init' parameter for framebuffer in device tree to prevent overwrite bootloader logo. I set this parameter to '1', but nothing was changed.
What should I do for kernel 3.14?
Sorry, I have no such plan. Basicly, what we should do in this use case, the IPU hardware shouldn't be re-initialized.
does this patch supports mipi dsi connector for lcd in u-boot?
Does this patch supports dual screen showing the same content (LVDS and HDMI channel) for JB4.3_1.1.0-ga BSP ??
No, it can't support dual display logo.
Hi, Liqiang.
I am testing with imx6q, in android4.4 and kernel 3.0.35,
I downloaded JB4.3_1.1.1_uboot_logo_keep_patch_2015-09-18, and applied just two patches,
0001-Enable-uboot-logo-for-HDMI-LCD-and-LVDS.patch to uboot,
0001-Keep-uboot-logo-for-Android-boot-supports-HDMI-LCD-a.patch to kernel,
When testing with lvds, it works fine, logo can show during uboot and kernel booting. then show android UI.
When testing with hdmi, it doesn't, uboot can display logo well, but during kernel booting, nothing displayed, after a while, android UI shows.
My Kernel command line:
console=ttymxc0,115200 androidboot.console=ttymxc0 vmalloc=400M init=/init video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 video=mxcfb1:off video=mxcfb2:off fbmem=28M androidboot.hardware=freescale
By testing HDMI, I found that, the screen first show logo, and soon logo dispeared, I noticed the backlight of hdmi is off at the same time. After a while, the backlight turns on, still no logo on the screen, just black. After a moment, android bootanimation starts on the screen.
Do you know what is the problem? Any suggestions?
Thanks.
You must set fb0base=0x27b00000 in your kernel command line, without this setting, kernel will alloc other memory for frame buffer.
Yes, changed as you said, it works.
But before kernel logo shows, there is a period that no logo and no backlight of the screen, that is, the uboot logo shows first, then disappear, and show again.
Do you know what is wrong with me? It seems the backlight is not always on during kernel booting.
I think your porting is not correct, you can add dead loop "while(1);" into your modified code step by step to identify the issue code.
I think you should check your display timing setting in your kernel file mxc_lcdif.c. After suspend and resume, the timing parameters in mxc_lcdif.c will be used.
By the way, after booted up, if you run followed commands, what's the result:
# echo 1 > /sys/class/graphics/fb0/blank
# echo 0 > /sys/class/graphics/fb0/blank
You can set the pins to GPIO for suspend, and set it high/low as you wanted.
hai sir ,
is it possible to apply this jelly bean patches on lolipop source .
Regards
Sachu
Hello,
I have used your patch as base to keep splash logo on the LVDS ( I use dual channel split mode of LVDS 1920x720 and D0 ) on Linux 3.10.17
The splash logo is keep all time but when I tried to send an image to the fb0 this image is shown with wrong colors and size :smileysad:
I have noticed that If I enter "echo 0 > /sys/class/graphics/fb0/rotate" before send image to fb0 the splash logo is shown twice in different color but the image that I sent is showing correctly.
Do you have any idea about how to solve this problem? I want to show my application image after the prompt is available without send "echo 0 > /sys/class/graphics/fb0/rotate"
Please make sure you have the followed code modification in ipu_probe(), it is related to the color issue.
@@ -357,7 +370,12 @@ static int __devinit ipu_probe(struct platform_device *pdev)
/* Set MCU_T to divide MCU access window into 2 */
ipu_cm_write(ipu, 0x00400000L | (IPU_MCU_T_DEFAULT << 18),
IPU_DISP_GEN);
+#ifdef CONFIG_MX6_CLK_FOR_BOOTUI_TRANS
+ } else {
+ ipu->fg_csc_type = ipu->bg_csc_type = CSC_NONE;
+ ipu->color_key_4rgb = true;
}
+#endif
Thanks a lot for the help
I also removed bpp= in the bootargs and it is working well
iMX6Solo和iMX6DL是一样的,你只要按照iMX6DL来改就可以了。
Hi Qiang Li,
How can our customer download the logo bmp file to emmc if they use emmc and no SD card design? In the path readme we use the dd the logo bmp file to SD card . Many thanks and looking forward your reply.
Have a nice day
Dan
You can reference to file "ucl2.xml" in MFGTool, there is example for how to use dd to burn the image files from PC to eMMC.