Patch to Support BT656 and BT1120 Output For i.MX6 BSP

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Patch to Support BT656 and BT1120 Output For i.MX6 BSP

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Patch to Support BT656 and BT1120 Output For i.MX6 BSP

Here are two patches to support BT656 and BT1120 output for i.MX6 ipuv3. With this patch, the i.MX6 can support the CVBS output on TV encoder. It is useful for a TV box.

"L3.0.35_1.1.0_GA_bt656_output_patch.zip" is the patch for Freescale L3.0.35_1.1.0_GA_iMX6DQ BSP.

"r13.4.1_bt656_output_patch.zip" is the patch for Freescale Android R13.4.1 BSP.

1. Features supported:

    1) Support BT656(8 bits) and BT1120 (16 bits)interlaced output on display port.
    2) Support both RGB and YUV frame buffer for BT656/BT1120 output.
    3) Support PAL and NTSC mode.
    4) Support on the fly switch between PAL and NTSC mode.
    5) Support CVBS output based on adv7391 TV encoder.

2. Hardware link between iMX6 and adv7391 TV encoder chip.
    IPU1_DI0_DISP_CLK connected to adv7391 CLKIN pin.
    IPU1_DISP0_DAT_23~DISP0_DAT_16 connected to adv7391 P7~P0 pins.
    IPU1_DI0_PIN2 connected to adv7391 HSYNC pin. (option)
    IPU1_DI0_PIN4 connected to adv7391 VSYNC pin. (option)
 
- Android R13.4.1 kernel.


3. How to use

-- Copy the two patch files to kernel folder.
    $ git apply ./0001-Support-BT656-and-BT1120-output-for-iMX6-ipuv3.patch
    $ git apply ./0002-Support-adv739x-TV-encoder-for-BT656-output.patch

-- Select them in kernel config and build the new kernel image:
                    Device Drivers  --->
                      Graphics support  --->
                          [*]   MXC BT656 and BT1120 output
                          [*]   ADV7390/7391 TV Output Encoder

-- Uboot parameters for video mode
   Output BT656 NTSC data to display port with UVYV frame buffer mode:
      "video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16"

   Output BT656 NTSC data to display port with RGB565 frame buffer mode:
      "video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=RGB565"

   Output BT656 PAL data to display port with RGB24 frame buffer mode:
      "video=mxcfb0:dev=bt656,BT656-PAL,if=BT656,fbpix=RGB24"

   Output CVBS NTSC signal on adv7391 with UYVY frame buffer mode:
      "video=mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=UYVY16"

   Output CVBS PAL signal on adv7391 with RGB565 frame buffer mode:
      "video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565"

-- Switch between PAL and NTSC
   $ echo D:720x480i-60 > /sys/class/graphics/fb0/mode
   $ echo D:720x576i-50 > /sys/class/graphics/fb0/mode


4. Note
    1) For 8 bits BT656 interface, the default data pins are "DISP0_DAT_23~DISP0_DAT_16", it can also
       be any other continued display data pins, for example if "DISP0_DAT_7~DISP0_DAT_0" are used, the
       macro "BT656_IF_DI_MSB" in "kernel_imx/drivers/mxc/ipu3/ipu_disp.c" should be changed from "23"
       to "7".

    2) For 16 bits BT1120 interface, the default data pins are "DISP0_DAT_23~DISP0_DAT_8", it can also
       be any other continued display data pins, the macro "BT656_IF_DI_MSB" should be modified if the
       hardware pins are changed.

    3) When bt656 interface is the second display for each IPU,1-layer-fb (it can be checked with command
       "$ cat /sys/class/graphics/fbx/fsl_disp_propperty"), the frame buffer can only be YUV format. In this
       case, the IPU DC channel was used for BT656 display, it has no CSC function, so RGB frame buffer was
       not supported.

2013-08-09 updated:

The new release package "L3.0.35_1.1.0_GA_bt656_output_patch_2013-08-09.zip" had fixed the BT656 dual display issue on iMX6S/DL.

Removed the old release package.

2013-09-04 updated:

The new release package "r13.4.1_bt656_output_patch_2013-09-04.zip" had fixed the BT656 dual display issue on iMX6S/DL.

For default, the dual display was tested with HDMI + CVBS, HDMI is the main display and adv739x CVBS output is the second display.

For iMX6DQ which has two IPUs, please assign dual display to two IPUs, for example adv739x is on IPU1 DI0, it is fixed, because hardware pins used for it is fixed. Then we can assign HDMI or LVDS to another IPU (IPU2).

For iMX6S/DL which has only one IPU, since adv739x had used IPU1 DI0, another display should be IPU1 DI1.

2013-09-30 updated:

Added patch for L3.0.35_4.1.0_GA BSP, the file is "L3.0.35_4.1.0_GA_bt656_output_patch_2013-09-30.zip".

2014-07-21 updated:

Added patch for L3.10.17_1.0.0_GA BSP, the file is "L3.10.17_1.0.0_GA_bt656_output_patch_2014-07-21.zip".

2015-01-26 updated:

Updated the IPU microcode for 1080i50 and 1080i60 BT1120 output, the parameters "N" for command BMA is a 8 bits parameters, so its max value is 255, but for 1080i50 and 1080i60 output, it needs more blank data in each line, the "N" will be bigger than 255, the updated IPU microcode can fix this limitation.

The updated file is "IPU_Microcode_Update_for_BT1120_1080i_20150126.zip". You can update the macro "DC_MCODE_BT656_xxx"  and function _ipu_dc_setup_bt656_interlaced() to the old patch if you used BT1120 mode to support 1080i display.

The verified 1080i display mode is:

{

   /* 1080I60 Interlaced output */

  "BT1120-1080I60", 30, 1920, 1080, 13468,

  20, 3,

  20, 2,

  280, 1,

  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,

  FB_VMODE_INTERLACED,

  FB_MODE_IS_DETAILED,},

{

  /* 1080I50 Interlaced output */

  "BT1120-1080I50", 25, 1920, 1080, 13468,

  20, 3,

  20, 2,

  720, 1,

  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,

  FB_VMODE_INTERLACED,

  FB_MODE_IS_DETAILED,},

2016-01-28 updated:

Updated IPU microcode to align with BT656.4 specification for NTSC output. For other BSP version with NTSC format support, please reference to ipu_disp_update.c for the final microcode.

File "L3.0.35_4.1.0_GA_bt656_output_patch_20160128.zip"., Details, please reference to the readme.txt file in the package.

2016-06-24 update:

Added BT656 and BT1120 progressive mode support.

File "L3.0.35_4.1.0_GA_bt656_output_patch_20160624.zip". Details, please reference to the readme.txt file in the package.

The patch for 3.14.52 GA1.1.0 BSP will be released in next week.

2016-06-27 update:

Add BT656 and BT1120 display patch for 3.14.52 BSP. File "L3.14.52_1.1.0_GA_bt656_output_patch_2016-06-27.zip", details, please reference to the readme.txt in the package.

2017-03-10 update:

Fixed a hard coding DC macro issue for progressive mode. Added patch "0008-Fixed-a-hard-coding-DC-macro-issue-for-progressive-m.patch" in L3.0.35_4.1.0_GA_bt656_output_patch_2017-03-10.zip.

The code in patch "L3.14.52_1.1.0_GA_bt656_output_patch_2016-06-27" is correct.

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Hi Li

Thanks for your hearful answer.

以上です、どうも宜しくお願い致します。

Hi Li

   My English is not good enough to explain the question I want to ask。

   I guess you are Chinese from your name. I'll use Chinese to explain the question.

   If you don't know Chinese. I'll try my best to explain it in English.

   现状:

     正常在使用过程中,如果想更改fb0的格式,可以直接使用fbset -g 1024 768 1024 768 32的命令来完成。

     我做了两套环境,A.使用patch之前,B.使用patch之后。

     在这两个环境中,我做这些操作,启动实机当前fb0为16位,启动某UI程序,关闭UI程序,fbset更改为32位,再次启动UI程序。

     A环境中,通过fbset更改fb0格式前后,启动的UI程序,显示都正常。

     B环境中,通过fbset更改fb0格式前,显示正常,更改后,显示不正常。将更改后的fb0的数据通过cat语句dump到文件中,

          在PC上查看,显示为正常的32位数据,实机画面显示效果为宽度拉伸了2倍的效果。

     如果通过uboot启动参数中,bpp=32来设置fb0,启动后32位显示正常,但是fbset更改16位以后,16位显示不正常。

     总结的问题为,无法在实机启动以后,去更改fb0格式。

   分析:

     查看了一部分patch的代码,发现启动有对实机启动以后,更改fb格式的代码。如果uboot参数中,没有定义一些变量,那么无法更改fb格式。

     但是具体更改哪些变量,我不太清楚。

    问题:

     1 这个现象在你的环境中是否存在?

     2 如果想在实机启动后更改fb格式,如何进行?

     3 如果无法在实机启动后更改fb格式,是否为bug,如何解决?

   多谢Li Qiang。

After applied the patch to Linux BSP, the frame buffer can support YUV format, but if application only set bpp 16 to framebuffer driver, there will be problem, the driver can't know it is RGB565 or UYVY16, both of them are 16 bpp. In this case, you should use ioctl "MXCFB_SET_FBFMT" to set the framebuffer format.

By the way, if you are using iMX6Q which has two IPUs, then you don't need support the YUV format frame buffer, because you can assgn the second IPU's DP channel to BT656/BT1120 display, it can support RGB frame buffer to YUV BT656/BT1120 display converting. In this case, you can un-mask the followed line in mxc_ipuv3_fb.c, function mxcfb_set_par(), then fbset will work as normal:

// mxc_fbi->fb_pix_fmt = bpp_to_pixfmt(fbi->var.bits_per_pixel);  // If the OS(such as Android) can only support RGB framebuffer, un-mask this line.

The limitation only happens on iMX6S/6DL which has only one IPU, and you need support dual display, in this case, if BT656/BT1120 was assigned as second display, then IPU DC channel will be assigned to it, for this IPU DC channel, it can't support RGB frame buffer to YUV BT656/BT1120 converting, so the frame buffer must be YUV format. Then the fbset will not work. It should be replaced with MXCFB_SET_FBFMT.

Thank you very much.

I'll try MXCFB_SET_FBFMT

m_c

Does it support 480P?

No, only interlaced mode was supported, for progressive mode, you can use the default LCD interface driver with VSYNC and HSYNC.

Hi Qiang,

Is there any patch available for supporting 1080p  output from MX6Q LCD port?

Or do you know any in-progress work about it?

m_c

Customer found the screen will turn green if run on i.MX6 Solo with below kernel parameter. Is there anything we need to check?

bootargs=console=ttymxc3,115200 init=/init nosmp no_console_suspend video=mxcfb0:dev=bt656,BT656-NTSC,if=BT656,fbpix=UYVY16 video=mxcfb1:off video=mxcfb2:off gpumem=96M fbmem=10M vmalloc=400M androidboot.console=ttymxc3 androidboot.hardware=freescale

m_c

Is it okay to modify drivers/video/mxc/mxc_ipuv3_fb.c as below for i.MX6 Solo?

Original

if (((mxcfbi->ipu_di_pix_fmt == IPU_PIX_FMT_BT656) || (mxcfbi->ipu_di_pix_fmt == IPU_PIX_FMT_BT1120)) && (mxcfbi->ipu_id == 0) && cpu_is_mx6dl())

Modified

if (((mxcfbi->ipu_di_pix_fmt == IPU_PIX_FMT_BT656) || (mxcfbi->ipu_di_pix_fmt == IPU_PIX_FMT_BT1120)) && (mxcfbi->ipu_id == 0) && !(cpu_is_mx6dl()))

Two limitations for the patch:

1. The android can only support RGB frame buffer, so "fbpix=UYVY16" can't be used in Android.

2. For single IPU system, only DP channel can support CSC from RGB frame buffer to YUV BT656 interface, so in the default patch, the BT656 was designed as second display, when frame buffer driver initializing, DC channel will be assigned to fb0, and DP channel will be assigned to fb1.

So if the customer used BT656 as fb0, they need recover the modification in function mxcfb_probe(), and use "fbpix=BGR32" for BT656 output.

if (((mxcfbi->ipu_di_pix_fmt == IPU_PIX_FMT_BT656) || (mxcfbi->ipu_di_pix_fmt == IPU_PIX_FMT_BT1120)) && (mxcfbi->ipu_id == 0) && cpu_is_mx6dl())

{

  /* first user uses DC */

Change to

if (0)

{

  /* first user uses DC */

Hi Qiang_FSL, There is an issue reported here Distorted Video i.MX6 gStreamer

after this patchset is applied.

The issue is that, if the movie being played has exactly the same resolution from the display, the playback is corrupted.

I was not able to reproduce the same issue when using the 3.10.17-ga release. So it seems that this is caused by some patch from this patchset.

Can you, please, help me on this?

Hi Qiang Li

     I use the BSP of LTIB to develop our project.The kernel release is  L3.0.35_4.1.0.But it dose not have the driver of BT1120.Does the patch of L3.0.35_4.1.0_GA_bt656_output_patch can use for LTIB.

Thank you.

good

Hi Qiang,

I'm finding the i.MX6Q code to capture the BT656 progressive mode 720P from Camera Input.

I found your patch, but I knew the patch was just for the interlaced mode not for progressive mode and just for video output.

Do you have any update for progressive mode of IPU CSI?

Best Regards,

Eric.

Hi Qiang,

Is it possible to output the below dual display (BT.656 and BT.1120 simultaneously)?

- IPU2 DI0 --> BT.656  w/1280 x 720p@30fps

- IPU1 DI1 --> BT.1120  w/1280 x 720p@60fps

BR,

Keita

Hi Keita, IPU microcode for progressive mode hasn't been implemented in this patch, so for 720P output, please use VSYNC/HSYNC output mode.

Hi Qiang,

Thank you for your reply. Let me clarify my understanding.


>so for 720P output, please use VSYNC/HSYNC output mode.

Is this meaning the default RGB data output with clock, HSYNC, VSYNC (not BT.656 and BT.1120)?

Best Regards,

Keita

Yes.

m_c

Hello Qiang,

May we know more detail about "default LCD interface driver"?

hi,Qiang,

There is two question for you,my env is as follow:

platform: imx6q

linux     : linux3.0.35

1.I want to use ipu1 for lvds in split mode(1080p) and use ipu2's DI0 for HDMI,and use ipu2's DI1 for BT656. Does the imx6q suport it?

2. what's the relation between mxcfb0/maxcfb1/mxcfb2(dev=mxcfb0/mxcfb1/mxcfb2 in bootarg) and ipu1/ipu2?

Best Regards.

wangzg

m_c

Is there any plan to port to u-boot to support splash screen?

HI Qiang:

1.Do you update this patch to the BT1120 1080p now?

2.I have to use the HSYNC, VSYNC for the 1080p,because this patch don't support BT1120 1080p.I use the mxc_lcdif.c for my driver, is right?

3.if I use the mxc_lcdif.c for my driver, dose it support YUYV16? Or just support RGB?

4.Please help me to answer this question is"IPU DI LCD HDMI LVDS".

please,thanks !

For 1, no BT656 and BT1120 progressive support.

For 2, yes.

For 3, the default BSP doesn't support YUV output, you can reference to "https://community.freescale.com/docs/DOC-100657" to add UYVY16 output on LCDIF, that patch was tested on 16bits LCD interface with UYVY16 1080i output in VSYNC and HSYNC mode.

Hi Qiang,

    Where I can find ADV7393 or BT656 patch for android-4.4.2_r1 ?

Thanks,

Hi Casper, you can port it from the current Linux patch, it is very simple since they are based on the same kernel version.

Hi Qiang,

Any update on BT656/BT1120 progressive mode?

We also have a tight deadline. If there isn't a schedule for the patch yet, can you provide some general description on what should be done in this patch?

Hi Isaac, there is no such plan, for progressive mode, another IPU microcode was needed, like the function _ipu_dc_setup_bt656_interlaced(), it is not a easy task, based on my experience, it needs about 6 weeks to implement such a code.

So if you need it, I think you can check with Freescale marketing people wether it can be supported in software service way.

HI Qiang:

when do you update BT656 and BT1120 progressive support?

The manual without obvious setting BT1120 progressive mode,I try to understand your patch, but I don't understand why you are so set the DC and DI register,Can you give me some advice and how to set up BT1120 progressive ?

How to understand  Microcode ?

Hi Qiang Li,

Thanks for this patch. I couldn't apply it to my kernel automatically (Bluechip Technology's Yocto Layer) so made the changes by hand. It works nicely using mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=RGB24 and running mxc_v4l2_tvin.out set with an NTSC camera. But with PAL settings there is a flickering almost like the interlace order is wrong. I've also had the occasional IPU errors:

imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_5 = 0x00000001

imx-ipuv3 imx-ipuv3.0: IPU Warning - IPU_INT_STAT_10 = 0x00080000

Once difference I've noticed between PAL and NTSC is in mxcfb_adv739x.c, adv739x_modedb has FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT set for NTSC and not PAL. Is this correct?

Thanks in advance

Jamie Whitham

Hi Qiang, I have this setup -

ipu1 disp0 = lcd

ipu1 disp1 = Not used

ipu2 disp0 = hdmi

ipu2 disp1 = Mipi Display

After applying the patch the contents of the Mipi display is corrupted when I start playback on the HDMI output. LCD not used in this test scenario. Any ideas on what it could be ? I'm using L3.10.17_1.0.0_GA

Any hints would be appreciated

Thanks,

/Otto

HI Qiang

Can you answer me a question about Nand flash?

https://community.freescale.com/message/456560#456560

Hi,

is it possible to have 2 separate BT.656 video outputs for SD PAL CVBS video (clk + 8 data lines, EAV/SAV, ADV7391)?

No other video outputs are required.

We are using Yocto with freescale kernel 3.10 on i.MX6Q automotive.

Which pins should we connect the 2 ADV7391 to?

Which patch or driver should we use?

Regards,

Mario

For iMX6Q, I think it can support two BT656 output, each IPU run one BT656 output. But I haven't tried such use case.

HI Qiang,

I'm running kernel 3.10.17 on iMX6Q with ADV7391.

unzip "L3.10.17_1.0.0_GA_bt656_output_patch_2014-07-21.zip"

but only get "0001-Support-BT656-and-BT1120-output-for-iMX6-ipuv3.patch"

Should i use ADV7391 patch?  Where i can find the patch?

Can i use old version "0002-Support-adv739x-TV-encoder-for-BT656-output.patch" of "L3.0.35_1.1.0_GA_bt656_output_patch_2013-08-09.zip" ?

Thanks,

Darren

Hi Qiang,

I am getting sudden "jumps" in the output video.

Using an FGPA to probe the display output, it seems the data during vertical blanking is not valid. Here is a screenshot: http://i.imgur.com/3wvuZFB.png

Note the 000 and 2AC values during vertical blanking. I think it should be 200 and 040 respectively.

The configuration I am using is BT1120-1080I50.

Yes, you are right, for that blanking, we just let the data line keep in last data state. Will this impact your display?

It causes some flickering and distortions in the display output for time to time (once every few seconds). We think the PLL in the display module fails to derive the input clock and gets out of sync when it receives many consecutive zeros which happens during vertical blanking and this causes the flickering and sudden "jumps" in the display output.

Hi Qiang,

Now, our system can work the BT.656 output correctly in jb4.2.2_1.1.0 by your patch.

And, we are considering the dual output source to single display for next product model.

(i.e we would like to change the video source i.MX6 or HDMI Rx.)

Refer to below system image.

Display out.png

[Question]

Q1.

By the setting of DSE=Hi-z, is it possible to cut the bus of i.MX6 and HDMI Rx?

(We would like to judge the whether or not external bus switcher is necessary.)

Q2.

Is the any special processing necessary except for DSE setting?

Best Regards,

Keita

Hi Keita, I think HIZ should be OK for your use case. You can also try on your current board to check if there is still BT656 signal output after HIZ setting.

Hi Qiang,

Thank you for your quick reply!

I have one more question.

Does this patch support the Video timing reference code [F bit(field1/field2), V bit, H bit(SAV/EAV)] of BT.656?

Best Regards,

Keita

Yes, the SAV and EAV is same as BT656 specification.

Hi Qiang,

We found the violation of BT.656 specification about F bit(field1/field2), V bit, H bit(SAV/EAV).

I send you the result of analysis about violation of BT.656 specification by e-mail.

[Q1]

Is it possible to fix the patch to comply BT.656?

(I want your answer asap.)

[Q2]

If Q1 yes, when will you release the fixed patch?

Best Regards,

Keita

I send you the result of analysis about violation of BT.656 specification.

HI,Qiang.

I want to use CVBS+HDMI+LVDS, but only when CVBS+HDMI or CVBS+LVDS could work,the thirth display cannot display anything.

how can I do?

You need draw something to third display's frame buffer and unblank it. If you are using Android, the android framework supports two displays default.

非常感谢,您的回复,下午我好好看看帖子,谢谢!!

hi,qiang,

I use the linux rootfs.

when I use the command:

setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565 video=mxcfb1:dev=hdmi,1920x1080M@60,if=RGB24 video=mxcfb2:dev=ldb,LDB-SVGA,if=RGB24 ldb=sin0'

I can draw something to the CVBS and HDMI ,this is work. but the lvds cannot,when I draw something to it's frame buffer ,nothing can see .

also when I use this command:

setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565 video=mxcfb2:dev=ldb,LDB-SVGA,if=RGB24 ldb=sin0 video=mxcfb1:dev=hdmi,1920x1080M@60,if=RGB24 '

I can draw something to the CVBS and LVDS display.but the hdmi cannot.

what's the problem.

You should pay attention to clock source and IPU DI port assignment:

For example:

BT656 on IPU1 DI0, clock source pll3_pfd_540M.

HDMI on IPU2 DI0, clock source pll5_video_main_clk.

LVDS on IPU2 DI1, clock source pll2_pfd_352M.

I search the arch/arm/mach-mx6/clock.c

I found :

int __init mx6_clocks_init(unsigned long ckil, unsigned long osc,

clk_set_parent(&ipu1_di_clk[0], &pll3_pfd_540M);  /* For CVBS 27MHz clock */
clk_set_parent(&ipu1_di_clk[1], &pll5_video_main_clk);
clk_set_parent(&ipu2_di_clk[0], &pll5_video_main_clk);

clk_set_parent(&ipu2_di_clk[1], &pll5_video_main_clk);

clk_set_parent(&ldb_di0_clk,&pll2_pfd_352M);

clk_set_parent(&ldb_di1_clk,&pll2_pfd_352M);

BT656 on IPU1 DI0, HDMI on IPU2 DI0,LVDS on IPU2 DI1。

above is ok?

i also found other problem:

when i use:

setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565 video=mxcfb1:dev=hdmi,1920x1080M@60,if=RGB24 video=mxcfb2:dev=ldb,LDB-SVGA,if=RGB24 ldb=sin0'

if i want to draw green colors to the hdmi,i must use"  ./fb_green /dev/fb2 " ,but not the " ./fb_green /dev/fb1".

why?

I search the arch/arm/mach-mx6/clock.c

I found :

int __init mx6_clocks_init(unsigned long ckil, unsigned long osc,

clk_set_parent(&ipu1_di_clk[0], &pll3_pfd_540M);  /* For CVBS 27MHz clock */
clk_set_parent(&ipu1_di_clk[1], &pll5_video_main_clk);
clk_set_parent(&ipu2_di_clk[0], &pll5_video_main_clk);

clk_set_parent(&ipu2_di_clk[1], &pll5_video_main_clk);

clk_set_parent(&ldb_di0_clk,&pll2_pfd_352M);

clk_set_parent(&ldb_di1_clk,&pll2_pfd_352M);

BT656 on IPU1 DI0, HDMI on IPU2 DI0,LVDS on IPU2 DI1。

above is ok?

i also found other problem:

when i use:

setenv bootargs_mmc 'setenv bootargs ${bootargs} root=/dev/mmcblk0p1 rootwait rw video=mxcfb0:dev=adv739x,BT656-PAL,if=BT656,fbpix=RGB565 video=mxcfb1:dev=hdmi,1920x1080M@60,if=RGB24 video=mxcfb2:dev=ldb,LDB-SVGA,if=RGB24 ldb=sin0'

if i want to draw green colors to the hdmi,i must use"  ./fb_green /dev/fb2 " ,but not the " ./fb_green /dev/fb1".

why?

For multi display resoure assignment, except the clock, the board file should also be checked. You can reference to How to config four-screen display -blog archive

Each IPU can support two display device with three frame buffer, fb1 is the overlay.

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