This article is to show how to use CLK2 for PCIe ref clock for i.MX8MQ.
Test Environment
i.MX8MQ + BSP L5.10.52
Background
In order to cost down, some customers used CLK2 as PCIe reference clock as below while no external OSC installed, which is different with i.MX8MQ EVK design, so no clock output for PCIe.
Checked L4.14.98_2.3.0 and found it added internal PLL for PCIe clock support.
Solution
The attached patch based on 4.14.98 can’t be used directly on 5.10.52, the following is the main modification for PLLOUT of PCIe clock. PLLOUT Monitor Configuration Register contains bits to control the clock that will be generated on the CCM clock mapped to CLK2_P/N.
