Hello,
I would like to use 2x MIPI DSI ports (8-lanes) to drive a LCD, 4-lanes of odd data, 4-lanes of even data. According to the post in the link below, the iMX8QM does support this. Is there a device tree example of how to achieve this using both DSI ports together?
In the mipi-dsi-bus.txt file in the device tree binding documentation folder, I see this mentioned, but I am unsure how to use this:
Optional properties:
- clock-master: boolean. Should be enabled if the host is being used in
conjunction with another DSI host to drive the same peripheral. Hardware
supporting such a configuration generally requires the data on both the busses
to be driven by the same clock. Only the DSI host instance controlling this
clock should contain this property.
https://community.nxp.com/t5/i-MX-Processors/Does-mx8-support-8-Lane-Mipi-output/m-p/1076945
