I am currently having problems getting a MIPI-LVDS bridge to work on the i.MX8MM with kernel 5.10.
I suspect that one of the problems is also the initialization sequence. The bridge has the requirement that DSI already provides stable data before a corresponding initialization via I2C (within the atomic_enable drm-bridge-function) can be performed.
I have now become aware of the pre_enable_prev_first flag. Applying this patch [PATCH v3 3/5] drm/bridge: Introduce pre_enable_prev_first to alter bridge init order -- DRI Develop... does not cause any change in my case.
What must be done to ensure that DSI delivers stable data when atomic_enable of the bridge is called?
Thank you very much.
The initalization of MIPI-DSI change in 6.1 kernel version so please upgrade your project, but I do not see why if this related to MIPI LVDS is a different thing.
thank you for your quick reply.
Since I use Android and my project is based on the Android 12 BSP from NXP, an update to a newer kernel is currently not planned.
Is there any information on the initialization sequence of MIPI DSI in combination with a bridge for kernel version 5.10?