SPI config not retained after PowerDown0

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SPI config not retained after PowerDown0

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arpad_toth
Contributor II

Hello,

MCU: QN908x

In PowerDown0 mode do I need to reinit SPI (and other digital) periphery after wakeup?

Using
SYSCON->PMU_CTRL0 |= SYSCON_PMU_CTRL0_RETENTION_EN_MASK;
doesn't seem to retain SPI configuration, although the SPI configuration is in registers and this bit should retain registers.

Datasheet says: In power-down mode 0, the processor state and registers, and SRAM values can be maintained. 

But it doesn't happen for SPI.

Cheers

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estephania_mart
NXP TechSupport
NXP TechSupport

Hello,

It will depend on the low power implementation you used, usually when the device goes to power down mode you do need to reinit the SPI because when the device goes to low power it disables the different peripherals that you initialized once and you need to re-configure it.

Regards ,

Estephania

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arpad_toth
Contributor II

Hello,

What about WDT, BOD peripherals? Would they reset?

CRC periphery doesn't seem to reset.

Datasheet should have a list what resets in PD0, PD1.

Cheers,

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estephania_mart
NXP TechSupport
NXP TechSupport

Hello,

In power-down 0 mode, power is shut off to the entire chip except for PMU domain, 32.768 kHz crystal oscillator, 32 kHz RC oscillator, sleep timer, RTC, and the RSTN pin. In power-down mode, the processor state and registers, and SRAM values can be maintained, and the logic levels of the pins remain static.

Still, it will depend in your implementation and how you set the power down configuration because you can keep them or you can reset them. Please check the Table 77.Peripherals configuration in reduced power modes or the QN908x user manual.

Regards,
Estephania

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