NXP IW611 - SDIO detection issue with i.MX 8QXP - 3.3V SDIO operation

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NXP IW611 - SDIO detection issue with i.MX 8QXP - 3.3V SDIO operation

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Kousik
Contributor I

Customer is using IW611 (Murata 2DL) with  I.MX 8QXP SoC in their custom design. SD_VIO is tied to 3.3V for 3.3V SDIO operation. PDn & IND_RST_WL/GPIO1 pins are pulled up in the hardware. SDIO card is not detected during the boot sequence.

 Regarding the device tree, they have included no-1-8-v property to restrict SD to high speed. I presume the vmmc_supply property is not required as it not controlled from the host processor. Also the power on sequence does not put any stringent requirement on the PDn lines with respect to power supplies (VIO, VIO_SD, AVDD33, AVDD18) as mentioned in the datasheet(minimum 0 ms)

SD_VIO

Customer is using only the legacy SD mode with compromised speed, and I presume 3.3V signaling (3.3V SD_VIO) should support up to UHS-1 High speed offering 25MB/s (25MHz).

PDn

The customer has probed and confirmed that the PD pin getting high before the SDIO clock. A clock with 400KHz is observed initially during the booting and the processor tries giving a clock downwards to 300KHz and so on. The module is not getting detected in the target board due to hardware command timeout error.

Could you help with possible cause and solution for the same?  Please find the attached device tree for the target board 

IW611 

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weidong_sun
NXP TechSupport
NXP TechSupport

Dear @Kousik ,

 

Your colleague, Deepak in India, submitted the same ticket as yours, I replied to him in his case.

You can confirm it with him.

 

Thanks!

Regards,

weidong

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