MPLABX/XC8/PIC18LF2580 connected to NT3H2211 via I2C.
I have followed the datasheet and have managed to get the
interface working. I can write and read all 64 bytes to SRAM.
A Logic analyzer has verified the commands, device addresses,
and data bytes (along with proper ACK's) are being xfer'ed as needed (to and from)
as indicated in the datasheet. The data sheet recommended delays have been
installed as instructed. Following the data sheet information exchange per
Section 9 - I2C COMMANDS Figure 18:
the first byte (D0) returned TO the HOST is indicated to be a DATA byte;
however, the SLAVE READ command byte (0xAB) is being returned in that
placeholder. The subsequent 15 bytes seem to be correct (and ordered correctly
albeit placed into the next array position - hopes this makes sense).
I have found to overcome this anomaly an extra read_device_byte() must
be placed after the write(0xab) command and before the loop to read all
SRAM page bytes. Is this behavior expected for all NT3H2211's? Is it a
chip batch specific problem? Or is it just this particular chip out of the
batch I have? Please advise.... Thanks for the assistance.