In MKW36A512RM, watchdog does not work in LLSx & VLLSx.
There are 8 DeepSleep mode in PWR_Configuration.h, looks like the watchdog only works in mode 6(MCU in STOP), But Mode 6 has a higher power consumption. Can I use watchdog in low power mode?
Hi,
The code do not realize. You have to add code by yourself. Actually, I am not sure if it is good to add watchdog into the low power mode.
Have a great day,
TIC
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Hi,
If you choose 1khz source clock for watchdog, you can use watchdog in vlps mode.
Have a great day,
TIC
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Hi nxf56274. How can I select vlps mode? In PWR_Configuration.h, no deepsleep mode is used in vlps mode.
/*-----------------------------------------------------------------------------
* The way that DeepSleep mode are handled. Following possibilities exist:
*******************************************************************************
*
*******************************************************************************
* 1: MCU/Radio low power modes: This is a BLE DSM specific low power mode. It requires cPWR_BLE_LL_Enable TRUE.
* MCU in LLS3 mode.
* BLE_LL in DSM.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* BLE_LL wake up interrupt(BLE_LL reference clock reaches wake up instance register) using LLWU module.
* - BTE_LL wakeup timeout: controlled by the BLE stack(SoC must be awake before next BLE action).
* - BTE_LL reference clock source: 32Khz oscillator
* - BTE_LL reference clock resolution: 625us
* LPTMR wakeup timeout: cPWR_DeepSleepDurationMs by default. Use PWR_SetDeepSleepTimeInMs
* to change it at run time. Maximum timeout is 65535000 ms (18.2 h).
* - LPTMR clock source: 32Khz oscillator
* - LPTMR resolution: modified at run time to meet timeout value.
* - LPTMR resolution: modified at run time to meet timeout value.
*******************************************************************************
*******************************************************************************
* 2: MCU/Radio low power modes: This is a non DSM general purpose low power mode.
* MCU in LLS2 mode.
* BLE_LL must be idle or cPWR_BLE_LL_Enable FALSE.
* GEN_LL must be idle or cPWR_GENFSK_LL_Enable FALSE.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* DCDC PowerSwitch - available in buck mode only.
* LPTMR interrupt using LLWU module
* - LPTMR wakeup timeout: cPWR_DeepSleepDurationMs by default. Use PWR_SetDeepSleepTimeInMs
* to change it at run time. Maximum timeout is 65535000 ms (18.2 h).
* - LPTMR clock source: 32Khz oscillator
* - LPTMR resolution: modified at run time to meet timeout value.
* RAM retention:
* - 16k Ram retention (0x20000000- 0x20003fff) if cPWR_RAM2_EnabledInLLS2 = 0(default)
* - 32k Ram retention (0x20000000- 0x20007fff) if cPWR_RAM2_EnabledInLLS2 = 1
*******************************************************************************
*******************************************************************************
* 3: MCU/Radio low power modes: This is a non DSM general purpose low power mode.
* MCU in LLS3 mode.
* BLE_LL must be idle or cPWR_BLE_LL_Enable FALSE.
* GEN_LL must be idle or cPWR_GENFSK_LL_Enable FALSE.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* DCDC PowerSwitch - available in buck mode only.
* LPTMR interrupt using LLWU module
* - LPTMR wakeup timeout: cPWR_DeepSleepDurationMs by default. Use PWR_SetDeepSleepTimeInMs
* to change it at run time. Maximum timeout is 65535000 ms (18.2 h).
* - LPTMR clock source: 32Khz oscillator
* - LPTMR resolution: modified at run time to meet timeout value.
*******************************************************************************
*******************************************************************************
* 4: MCU/Radio low power modes: This is a non DSM general purpose low power mode.
* BLE_LL must be idle or cPWR_BLE_LL_Enable FALSE.
* GEN_LL must be idle or cPWR_GENFSK_LL_Enable FALSE.
* MCU in VLLS0/1 mode(VLLS0 if DCDC bypassed/ VLLS1 otherwise ).
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* DCDC PowerSwitch - available in buck mode only.
*******************************************************************************
*******************************************************************************
* 5: MCU/Radio low power modes: This is a non DSM general purpose low power mode.
* MCU in VLLS2 (16k Ram retention (0x20000000- 0x20003fff)).
* BLE_LL must be idle or cPWR_BLE_LL_Enable FALSE.
* GEN_LL must be idle or cPWR_GENFSK_LL_Enable FALSE.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* DCDC PowerSwitch - available in buck mode only.
*******************************************************************************
*******************************************************************************
* 6: MCU/Radio low power modes:
* MCU in STOP.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* DCDC PowerSwitch - available in buck mode only.
* LPTMR wakeup timeout: cPWR_DeepSleepDurationMs by default. Use PWR_SetDeepSleepTimeInMs
* to change it at run time. Maximum timeout is 65535000 ms (18.2 h).
* - LPTMR clock source: 32Khz oscillator
* - LPTMR resolution: modified at run time to meet timeout value.
* - LPTMR resolution: modified at run time to meet timeout value.
* Any Radio interrupt
* UART
*******************************************************************************
*******************************************************************************
* 7: MCU/Radio low power modes: This is a GENFSK DSM specific low power mode. It requires cPWR_GENFSK_LL_Enable TRUE.
* MCU in LLS3 mode.
* GENFSK_LL in DSM.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* GENFSK_LL wake up interrupt(GENFSK_LL reference clock reaches wake up instance register) using LLWU module.
* - GENFSK_LL reference clock source: 32Khz oscillator
* - GENFSK_LL reference clock resolution: ~30.5us
* LPTMR wakeup timeout: cPWR_DeepSleepDurationMs by default. Use PWR_SetDeepSleepTimeInMs
* to change it at run time. Maximum timeout is 65535000 ms (18.2 h).
* - LPTMR clock source: 32Khz oscillator
* - LPTMR resolution: modified at run time to meet timeout value.
* - LPTMR resolution: modified at run time to meet timeout value.
*******************************************************************************
*******************************************************************************
* 8: MCU/Radio low power modes: This is a BLE DSM specific low power mode. It requires cPWR_BLE_LL_Enable TRUE.
* MCU in VLLS2/3 mode.
* BLE_LL in DSM.
* Wakeup sources:
* GPIO (push button) interrupt using LLWU module(SW2(PTA18),SW3(PTA19)).
* BLE_LL wake up interrupt(BLE_LL reference clock reaches wake up instance register) using LLWU module.
* - BTE_LL wakeup timeout: controlled by the BLE stack(SoC must be awake before next BLE action).
* - BTE_LL reference clock source: 32Khz oscillator
* - BTE_LL reference clock resolution: 625us
* LPTMR wakeup timeout: cPWR_DeepSleepDurationMs by default. Use PWR_SetDeepSleepTimeInMs
* to change it at run time. Maximum timeout is 65535000 ms (18.2 h).
* - LPTMR clock source: 32Khz oscillator
* - LPTMR resolution: modified at run time to meet timeout value.
* - LPTMR resolution: modified at run time to meet timeout value.
* RAM retention:
* - 16k Ram retention (0x20000000- 0x20003fff) if cPWR_RAM2_EnabledInLLS2 = 0(default)
* - 32k Ram retention (0x20000000- 0x20007fff) if cPWR_RAM2_EnabledInLLS2 = 1
* - Full Ram retention in VLLS3
*******************************************************************************
*/