who can give me a sample code of ddr3?

[赵国海]

who can give me a sample code of ddr3?thanks.

My pcb demo is designed base on TWR-VF65GS10 Rev.H,the pcb placement and route is same as TWR-VF65GS10 Rev.H .the DDR3

chip is same as TWR-VF65GS10 Rev.H too.I use MQX 4.1,DDR3 works fails sometimes.I download the code to DDR3,CPU works OK sometimes,but fails usually.

[bart_butler]

The Rev H Tower board has not been released at this time.

Since your design is based on the pre-release information, you must have worked with a FAE to obtain the design files.

Thus you need to work through the FAE for these support questions.

As we are working to validate the board at this time, the information may not be available.

Upon the internal validation, we will send boards to TimeSys for their system level validations also.

The DDR settings are generated by our internal apps team and provided to TimeSys.

We are targeting to complete the internal validation by May 2.

I am hopeful we can provide you information very quickly.

[赵国海]

Can you provide me the code that you internal validation？I want to try it in my PCB.

My email is zhaogh@sciyon.com .

Thanks!

[bart_butler]

Possibly by the end of the week, or as soon as I can confirm the board and code are functional.

We do not want to create additional support issues.

[赵国海]

I change the value of the DDR_CR154 register  0x682C0000 instead of 0x68200000. it can  works every time,but  just lasts a period ，fails soon.

[naoumgitnik]

Hello,

Please, be patient -  we are planning to have the final settings later this week.

The reason we are a bit reluctant to post our preliminary results on the Community is to not confuse the other customers.

Sincerely, Naoum Gitnik.

[赵国海]

DDR memory access error occurs only when the power-up or reset, once an error occurs, the error continues to occur. Once correct, access is always right (test 12 hours).

Probability of success is 70% on power-up or reset.

Error very regular,Error is very regular, the second byte is always 0xff. my test code is as follows.

Results is as follows

[赵国海]

if I read it again in “printf”，the result is read correctly in second time. so I think DQS-read parameters unreasonable.

[karina_valencia]

naoumgitnik can you continue with the follow up?

[naoumgitnik]

Hello Karina,

This thread may be closed - it has been taken care of via the FAEs.

Regards, Naoum Gitnik.

[赵国海]

OK，thank you.

Is it  available now? If available ,please send me just for test.zhaogh@sciyon.com .

[ruizhengxin]

Is any DDR calibration tool  available for Vybrid?

[bart_butler]

We are working on a DDR calibration tool within the Processor Expert tool.

I believe it is still at Beta testing level.

[timesyssupport]

Hello,

We do not have any MQX sample code for DDR3 beyond what is already included in MQX. We would require your hardware to properly diagnose this issue.

Thanks,

Timesys Support

[karina_valencia]

timesyssupport can you attend this case?