We try to program our Vybrid VF50 and VF61 products directly thought JTAG. We plan to write the bootloader directly to NAND flash through JTAG boundary scan. This works in general. We would like to write the bootloader directly by using the correct ECC settings (ECC mode 6, 45bytes for 24 bit correction). Is there any source code which does the ECC calculation for a NAND page? I know its using BCH as an algorithm. Did anyone already test such an approach on Vybrid.
Could the source code of kobs-ng for iMX help? Does it use exactly the same ECC algorithm as on Vybrid?
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The Vybrid NFC module is different that the one on i.MX, but not sure about algorithm. NCF contain built-in ECC logic. NFC performs ECC calculation on-the-fly. No source code for ECC calculation is needed. We have examples codes of usage ECC in MQX, but they use also build-in ECC logic.
Thanks for your answer. I know about the built-in ECC in Vybrid. However, if we want to use JTAG Boundary Scan to write to flash, we also need to write the ECC correctly, otherwise the Vybrid can''t load the bootloader, because the ECC information is missing.
I know, there might be some other workarounds. But since we already have our process for other existing products which follows this path, it would be easy to also use the same process for our vybrid products. So the only thing missing is the code which generates the ECC as used by the vybrid NFC. If you don't have source code for it, it would be helpful to at least know the algorithm which is used. I know it's BCH, but do you have some more information about it?
ECC codes are generated and written into spare area on-the-fly, so ECC information will not be missing. Anyway I will try to get the information which code from BCH class is used from architect/designer. Stand-by.