Naoum,
DS-5 debugger shows TOT and TOTR bits defined in CRC_CTRL register. According to descriptions provided in DS-5 debugger registers view and according to Figure 33-1 in Vybrid RM Rev 5, these bits should control byte and/or bits transposition on input side (TOT) and output side (TOTR) of CRC block. According to DS-5 5.16, TOT are CTRL bits 31:30 and TOTR are CTRL bits 29:28.
I tried toggling TOT and TOTR bits in debugger but didn't notice any change in resulting CRC. I guess TOT and TOTR blocks are removed, at least in 1N02G maskset. It seems Figure 33-1 need an update.
BTW output registers are in low endian format, which is fine for me. Input requires byte reversal, TOT bits could help here.
IMO TCRC bit also could be removed. TCRC=0 is 16-bit mode, TCRC=1 is 32-bit mode. On 32-bit CPU I think it is much better to feed CRC unit with 4 bytes at once, even when calculating 16-bit CRC. See attached source for CRC16 CCIT (poly=1021).
