Vybrid VF6 Memory Protection

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Vybrid VF6 Memory Protection

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neilfoss
Contributor I

Hi,

I'd like to prevent the A5 core from accessing memory areas belonging to the M4 core in the Vybrid VF6. Does anyone know how I'd go about doing this?

So far I can see that the M4 has a Memory Protection Unit but not the A5, otherwise I could have set it up and then protected the registers using the Central Security Unit

Any help appreciated

Thanks,

Neil

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kef2
Senior Contributor V

A5 has MMU. In MMU translation tables you can specify which areas are read only, which areas are XN (execute never) etc. Chapter B3 from ARM architecture manual may help understanding it:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406b/index.html

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kef2
Senior Contributor V

A5 has MMU. In MMU translation tables you can specify which areas are read only, which areas are XN (execute never) etc. Chapter B3 from ARM architecture manual may help understanding it:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0406b/index.html

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